I have problem that FIFO overrun error occur when start transmit/receive immediately after reset RX FIFO.
Here is questions.
1. What is the execution time of the RX FIFO reset?
2. How to confirm complete RX FIFO reset?
3. Is it when the RDR bit changes from 1 to 0?
Or is the RX FIFO Reset bit automatically changed to 0?
Please reply as soon as possible.