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QCVS ACE

Question asked by Jesse McCall on Mar 15, 2017
Latest reply on Dec 7, 2017 by yixuan hao

I'm attempting to perform board check-out on a custom board. I have the processor in a good state (it has a valid RCW) and now I'm attempting to check out RAM using the QCVS and, afterwards, push the configuration into a TCL script to initialize the processor. When I try to run the QCVS DDR Validation tool's Validation Stage, it fails on "Write-Read-Compare Run 1" and gives the reason as: "Error configuring the target! - DDR initialization failed: D_INIT was not cleared by hardware!"

 

Write-Read-Compare Run 2 then fails with the reason "ERR_DETECT register not empty, test did not run."

 

When I look at my error capture registers, I see the following:

 

Err. capture registers:
0xE20, 0x00000000 0xE24, 0x00000000 0xE28, 0x00000000 0xE40, 0x00000080
0xE44, 0x00000000 0xE48, 0x00000000 0xE4C, 0x00000000 0xE50, 0x00000000
0xE54, 0x00000000 0xE58, 0x00010000  

 

It looks like there is an ACE being thrown. Is this a failure from the discrete RAM's side or from the T4240's side? Who actually does the automatic-calibration?

 

Is D_INIT not being cleared BECAUSE of the ACE or is the ACE being thrown because D_INIT is not cleared?

 

What would be causing these errors? 

 

I'm using discrete chips on each and every controller.

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