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LS1021A Tower Board TBI internal phy link failure

Question asked by Romit Chatterjee on Nov 22, 2016
Latest reply on May 8, 2017 by Swanand Purankar

I am writing an Ethernet device driver for the LS1021A Tower board, running a custom OS. eTSEC3 is working fine in RGMII mode. eTSEC1 and eTSEC3 are detected as SGMII and status register of external phy confirm that link is up. However, TBI status register shows that the interface is down. Is there any procedure to check the status of SerDes module? Do I need to set anything in SerDes module or somewhere else?

I am also not getting any RX/TX interrupt in eTSEC1 and eTSEC2.

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