We are developing a custom board with the LS1020a chip and an N25Q256 QSP flash from which we will boot u-boot. In preparation, I am using the LS1021ATWR to prepare for initial integration - which involves loading u-boot and RCW into flash and debugging u-boot.
I used CW flash programmer to load the RCW and U-boot onto the dev board's QSPI flash. This works - on power-up the board boots to the u-boot command line (I can see that it is my code by board name and version string). The command line and u-boot functions are fully functional at this point.
Now, when I try to debug (using the several references from NXP for debugging u-boot), a couple of strange things happen:
1. When I connect, PC = 0; I kind of expected it to be in DDR where it runs U-Boot. I believe this was the case when I debugged u-boot from NOR.
2. The RCW registers in DCFG_CCSR are wiped out
3. The UART output and input are garbage
I can perform the reset from CW, but the above conditions still hold. I guess that the debugger is resetting the DSP, though I've disabled all reset and initialization I can find in the connection/launch configuration.
The reset doesn't really bother me (though it requires that I manually keep my jtag init file synchronized with actual RCW code). The big problem is the UART - does anyone have any ideas about what happens to the UART during debug attach/reset? I suppose it could be a clocking issue as well. Everything else seems to be running OK - the code relocates to DDR and is servicing the console, but incoming and outgoing data is garbage.