I'm wondering about the max frequency of the VPU core in iMX6DQ.
The reference manual states that the VPU has two clocks, aclk with max 266 MHz and cclk with max 266 or 352 MHz. Both seems to be driven from vpu_axi_clk_root, so how can I clock the VPU at 352 MHz?
It is also written that 352 MHz depends on VDD_PU_CAP with a reference to "operating ranges in the datasheet", where can I find this information?
I also found this page: Video Playback Performance Evaluation on i.MX6DQ Board
Where it seems you have clocked the VPU at 382 MHz as well, how is that done?
I would like to run the VPU at a minimum of 266 MHz to be able to encode/decode 1920x1080 @ 30 fps. So I either need to select AXI_CLK_ROOT and make it run at 266 MHz (not sure of consequences) or select 352 MHz (PLL2_PDF0). AXI_CLK_ROOT currently runs at 198 MHz derived from MMDC_CH0 running at 396 MHz.