I add a custom driver for cpu clock control on linux 3.14 (based on freescale's driver from 2.6.35). This driver works but I have an issue. If I reduce the CPU clock (261.819, 360 or 392.728 MHz) I have some data error when I receive data on SPI bus (number 2). The SPI bus doesn't miss data but modify some bytes (but not all of them) : bxxxxxx01 is changed to bxxxxxx00 and bxxxxxx10 is changed to bxxxxxx11 . At 454.737Mhz (max clock) I have no problem.
I checked waveform of data bus with an oscilloscope and the shape and timing are correct.
Someone knows this problem ?