About the terminator of DDR3L memory of LS1020A.

[masaakiuno]

Hello,

I am watching a connection diagram of LS1021A-twr.

A terminating resistance of CLK of DDR3 of P1010RDB is just between± 100 Ω.

LS1021A-twr adds a condenser to 72 Ω of resistance, and is connected to GVDD.

Is this circuit the specification of LS102xA? Or is there a different reason?

In particular, I can't understand the reason that a condenser exists by this circuit.

Best Regards,

Maaski.Uno

[ufedor]

Please provide picture of the termination in question.

[masaakiuno]

Dear ufedor,

The circuit I'd like to know is at the red arrow.

Further, I make a mistake, and 2 has turned the same question.

I'm sorry.

Best Regards,

Maaski.Uno

[ufedor]

Please refer to the section "Termination Topology" in the following application note:

https://www.maximintegrated.com/en/app-notes/index.mvp/id/4085

Concerning R231 and R232 values I believe that they were obtained during the layout simulation.

[masaakiuno]

Dear ufedor,

Thank you very much for your answer.

I read document of the answer I received from you.

By the way, why is there C157 in this circuit?

Is this here to remove noise?

Best Regards,

Maaski.Uno

[ufedor]

The capacitor provides a low impedance to ground for any common-mode noise induced on the diffrential pair.