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Can't have SDA completely low at ACK  on HAL I2C ,MKV31

Question asked by Diego Colombo on Jan 6, 2016
Latest reply on Jan 8, 2016 by Diego Colombo

Hi to all the people in the community

 

i have an intermediate level when i check ACK bit in an I2C communication ,with uC sending the correct address slave,

It looks like  after the 8th bit,the master uC , instead of releasing the SDA line, holds it at high level,in conflict with the acknowledging peripheral

low level , :

20160106_174356.jpg

Notice that if i use the same pins in GPIO bitbang ,everything works as expected.

 

I decided to use a MKV31F256VL uController in a prototype needing versatile PWM and good clock speed

I had to communicate via I2C  with a RTCC.

 

I did the same thing in minutes in a previous version using a baseline uC,a MKL15 ,using  Code Warrior 10.5,

The PE component for I2C gave me easily the necessary methods.

 

With this uC  i had to use KDS._12C_hal

The GenericI2C component seems not completely implemented for this device.So  i tried with a lower level component:fsl_i2C_hal

I used it in a non -OSA project,in a very simple way,not very differently than directly accessing to registers,with no interrupts or semaphores.

 

  I2C_HAL_SetDirMode(I2C0_BASE_PTR,1);

  I2C_HAL_SetAddress7bit(I2C0_BASE_PTR,0x6E);

  I2C_HAL_SetBaudRate(I2C0_BASE_PTR,60000000,300,0);

  I2C_HAL_Enable(I2C0_BASE_PTR);

  while(1)

  {

        Delay_ms(1);

        I2C_HAL_SendStart(I2C0_BASE_PTR);

        I2C_HAL_WriteByte(I2C0_BASE_PTR,0xAE);

        Delay_ms(1);

   }

The pullup resistors are both 10K.

 

Many thanks

Diego

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