AnsweredAssumed Answered

LDO turning from 0x1F to 0x1E cause i.MX6DL hang

Question asked by Nori Shinozaki on Sep 25, 2014
Latest reply on Oct 16, 2014 by igorpadykov

Hello Champs,

 

My customer encountered a CPU hang when going to analog bypass mode(0x1E) from LDO bypass mode(0x1F).

 

1

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG4–0)= 10010(1.150V:LDO Enable )

 

2-1

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG(4–0)= 11111(0x1F:LDO Bypass )

 

3

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG(4–0)= 11110(0x1E:Analog Bypass )

 

However, when they add an intermediate step 2-2 below,  they can move to analog bypass

 

1

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG(4–0)= 10010 (1.150V, LDO Enable )

 

2-1

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG(4–0)= 11111 (0x1F:LDO Bypass )

 

2-2

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG(4–0)= 11100 (1.425V, LDO Enable ) <-1.425V is out of spec, but it works fine moving to 0x1E

 

3

-  CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

-  PMU_REG_CORE-REG0_TARG(4–0)= 11110 (0x1E:Analog Bypass )

 

The issue seems to relate to ERR005852, however they are not using DSM anyway.

Do you find anything wrong with the first sequence?

 

Best regards,

Nori Shinozaki

Outcomes