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Where the encoding for LTSSM states of the PCIe core in the i.MX6 Solo can be found?.

Question asked by Andres Gonzalez on Aug 27, 2014
Latest reply on Aug 27, 2014 by igorpadykov



While checking the Debug Register 0, that is part of the Port Logic register of the PCIe Core in the i.MX6 Solo processor we were interesting in knowing the current LTSSM state of the PCIe Core. However the datasheet says:


[5:0]: xmlh_ltssm_state LTSSM current state. See source for encodings


Could somebody tell me where this encoding is located?.


Thanks in advance.