I found this Q&A: How is VPU Latency on i.MX6: Q&A: How is VPU Latency on i.MX6
First, I can't access the referenced discussion: VPU Latency i.MX6. Is there a reason it is blocked?
The answer is not clear enough (at least for me ;-) ).
We need to implement an entire encoding/decoding system like this
Camera => encoder => transmission => decoder => display
What end to end (encoder input to decoder output) latency can we achieve?
We need less then 100ms. Is this possible?