I have an iMX6 Dual Sabre SD (SABRE Platform for Smart Devices Based on the i.MX 6 Series Product Summary Page) with 1Gb of DDR3 (2*512 I guess since I see two chips on the board but I'm not sure of that) and I would like to limit the DDR bus to 32 bits instead of 64 bits.
I found this : Re: iMX6 DualLite with Micron DDR3 (2 x MT41J128M16HA) so I tried to add this lines in my flash_header.S :
MXC_DCD_ITEM(72, MMDC_P0_BASE_ADDR + 0x000, 0x83190000) //limit to 32 bits
MXC_DCD_ITEM(84, MMDC_P0_BASE_ADDR + 0x818, 0x00000000) /* Disable ODT. TEST*/
MXC_DCD_ITEM(85, MMDC_P1_BASE_ADDR + 0x818, 0x00000000)
But I get the same time for reading my uImage in u-boot (I've added some timers there) so I guess my modifications changed nothing. So did I follow the good way to limit the DDR bus ? And how can I check if my modifications are OK ?
EDIT : or should I just replace the
#define CONFIG_DDR_64BIT /* for DDR 64bit */