Overview
i.MX6Dual/Quad and i.MX6DualLite supports 32-bit and 64-bit DDR3. Freescale i.MX6 SabreSD board deploys 64bit DDR3 and 64bit DDR3 script is delivered into Linux/Android Software release. This document introduces how to create i.MX6 32bit DDR script based on 64bit DDR script when deploying 32bit DDR on customized board.
Changes
- Set the DSE field in the following iomux registers to 0 - disable unused IO pad to save power:
IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS4
IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS5
IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS6
IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS7
IOMUXC_SW_PAD_CTL_GRP_B4DS
IOMUXC_SW_PAD_CTL_GRP_B5DS
IOMUXC_SW_PAD_CTL_GRP_B6DS
IOMUXC_SW_PAD_CTL_GRP_B7DS
IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM4
IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM5
IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM6
IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM7
- Update MMDC registers to reflect 32bit DDR changes:
MMDC0_MDASP: Update CS0_END if CS size is changed.
MMDC0_MDCTL: set DSIZ to 32 bit
MMDC1_MPODTCTRL: Set it as 0 and disable the odt of higher byte
- Follow "i.MX 6 Series DDR Calibration" Application note to calibrate DDR parameters.
Reference
One example about 32bit DDR script is located under uboot-imx git ( File: board/freescale/mx6q_sabresd/flash_header.S). Open it and you can see the following script:
#if defined CONFIG_MX6DL_DDR3
#if defined CONFIG_DDR_32BIT
...
#endif
You can refer to it and create your 32bit DDR script.
