B4860 - SC3900 and DPAA?

[garryg]

Has anyone successfully made use of the B4860's DPAA via StarCore SC3900 cores?

Did you make use of the NSCW PA drivers and port them to SC3900?

Were you able to create an use-case CW SC project that demonstrates it?

Please share your insights.

Thanks,

Garry

[nikunjtapodhan]

Hi Garry ,

Platform in use: Starcore b4860 soc (e6500 powerpc)

I am currently trying to port the DPAA Benchmark NETCOMM SW 4.7 Use case example on e6500 powerpc.

Previously I faced issue while importing and building the project, its been resolved now(by going back to codewarrior 10.3 version for power pc).

After the successful build now problem is that I am not able to run the example code on hardware(currently using debugger mode), it is showing either "Not able to set breakpoints at Sysinitplatform" or  "Target initialization failure". Do you suspect any problem with Q4860_init.tcl or Q4860.mem configurations??

Or any stack pointer manipulations required to solve the issue??

Can you give some direction please?

regards

nikunj

[Daniel_Popa]

Hi Garry,

Not as far as i know.

Why do you need this ? To send msg over the ETH from StarCore side ?

Best regards,
Daniel

[garryg]

Yes.  Actually, this question is resolved now.

I am posting this here in case anyone else runs into this issue.

We have a customer that ported the NCSW drivers from PA to SC3900.  We found out, after much effort, that mmu settings impact access to these registers.  One must take care to mark "peripheral and guarded" the "Qman Software Portal cache-inhibited region" registers.

Regards,

Garry

[lunminliang]

Thank you for sharing the information Garryg.

I am interested in this topic, why the customer want to ported the DPAA driver from PA to SC3900, is there any special reason they want to implemented that in SC3900 since there is already driver on PA side?

[yuxiangzhang]

my guess that talking to eth from sc3900 would reduce the latency to other parts of system, especially for the applications where they only use DSP cores, and not the E6500s if consider the power comsuptions and cheaper interfaces.