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03-21-2018
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I am using MPC8461D. The software prefetch instructions included in Altivec instructions are vec_dst, vec_dstst, vec_dststt, vec_dstt. I am not able to get a clear idea how these instructions help in prefetching the data and how the caches L1 and L2 are
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03-21-2018
11:24 PM
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PowerQUICC Processors
投稿者:
snehaljadhav
、投稿日時:
03-21-2018
11:24 PM
最終投稿日時:
03-27-2018
06:53 AM
、投稿者:
alexander_yakov
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上位のタグ付け
I am using MPC8461D. The software prefetch instructions included in Altivec instructions are vec_dst, vec_dstst, vec_dststt, vec_dstt. I am not able to get a clear idea how these instructions help in prefetching the data and how the caches L1 and L2 are
- (
03-21-2018
11:24 PM
)
PowerQUICC Processors
投稿者:
snehaljadhav
、投稿日時:
03-21-2018
11:24 PM
最終投稿日時:
03-27-2018
06:53 AM
、投稿者:
alexander_yakov
1
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1324
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1
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1324
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