MIMXRT685-EVK_How to access I3C device register with 8 bytes address?

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MIMXRT685-EVK_How to access I3C device register with 8 bytes address?

2,101 Views
Jin_Tien
Contributor II

Hi,

I have an I3C device and it's register address has 8 bytes.

After checking the SDK example to read data via I3C interface, I saw the maximum size of "subaddressSize" is 4 bytes.

May I ask how to read register which has 8 bytes (e.g: 0x40110500) address? 

 

Have a nice day,

Jin Tien

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vicentegomez
NXP TechSupport
NXP TechSupport

I am really sorry for the I3C there is not much information, but we have the application note 

https://www.nxp.com/webapp/Download?colCode=AN12796&location=null

 

and

https://www.nxp.com/docs/en/application-note/AN13577.pdf

regards

 

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Jin_Tien
Contributor II

Hi,

I've used the sample code of CCC command to send the large bytes address, the code I wrote as below:

int main(void)

{

//Skip the I3C master config parts.

i3c_callArm();

}

void i3c_callArm(void)
{
display_ccc_status(i3c_callAr());
return;
}

 

enum I3C_COMM_STATUS i3c_callAr(void)
{
uint8_t Arm_DA_Reg_00 = 0x40;
uint8_t Arm_DA_Reg_01 = 0x13;
uint8_t Arm_DA_Reg_02 = 0x06;
uint8_t Arm_DA_Reg_03 = 0x00;
uint8_t aux_ccc_param[CCC_FRAME_PARAM_ARRAY_SIZE];

i3c_ccc_fsm_param_reset(aux_ccc_param);

aux_ccc_param[CCC_FRAME_NOF_SEGMENTS ] = 1;

aux_ccc_param[CCC_FRAME_SEG1_ADDR ] = Arm_DA; //Dynamic Address of slave is 0x55
aux_ccc_param[CCC_FRAME_SEG1_WRD ] = CCC_ADDR_WR;
aux_ccc_param[CCC_FRAME_SEG1_DATA_FIRST] = CCC_FRAME_SEGx_DATA;
aux_ccc_param[CCC_FRAME_SEG1_DATA_CNT ] = 4;
aux_ccc_param[aux_ccc_param[CCC_FRAME_SEG1_DATA_FIRST] + 0] = Arm_DA_Reg_00;
aux_ccc_param[aux_ccc_param[CCC_FRAME_SEG1_DATA_FIRST] + 1] = Arm_DA_Reg_01;
aux_ccc_param[aux_ccc_param[CCC_FRAME_SEG1_DATA_FIRST] + 2] = Arm_DA_Reg_02;
aux_ccc_param[aux_ccc_param[CCC_FRAME_SEG1_DATA_FIRST] + 3] = Arm_DA_Reg_03;

// Second segment: read 8 bytes from Arm DA
aux_ccc_param[CCC_FRAME_SEG2_ADDR ] = Arm_DA; //Dynamic Address of slave is 0x55
aux_ccc_param[CCC_FRAME_SEG2_WRD ] = CCC_ADDR_RD;
aux_ccc_param[CCC_FRAME_SEG2_DATA_FIRST ] = CCC_FRAME_SEGx_DATA + aux_ccc_param[CCC_FRAME_SEG1_DATA_CNT];
aux_ccc_param[CCC_FRAME_SEG2_DATA_CNT ] = 8;

return i3c_ccc_fsm(aux_ccc_param);
}

// specify parameters needed for CCC frames to be transmitted
enum CCC_PARAM
{
CCC_FRAME_NOF_SEGMENTS = 0,
CCC_FRAME_SEG1_ADDR, CCC_FRAME_SEG1_WRD, CCC_FRAME_SEG1_DATA_CNT, CCC_FRAME_SEG1_DATA_FIRST,
CCC_FRAME_SEG2_ADDR, CCC_FRAME_SEG2_WRD, CCC_FRAME_SEG2_DATA_CNT, CCC_FRAME_SEG2_DATA_FIRST,
CCC_FRAME_SEGx_DATA,
CCC_FRAME_PARAM_COUNT // DO NOT REMOVE THIS LINE!!!
};

 

According to above code, I expect that I can access the 0x40130600 and read 8 bytes data back.

However, the waveform shows that master only send 0x401306, then slave return a NACK then command stopped. 

May I know what's the possible problem about this issue?

If you need more information to know this issue, please feel free to ask, thanks!

 

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Jin_Tien
Contributor II

In latest observation, I think the SEG1 data can only send 4 bytes (include dynamic address).

Even modify the "aux_ccc_param[CCC_FRAME_SEG1_DATA_CNT ] = 4;" as 8, the command only can be sent as 4 bytes.

Do you know where can modify the structure of "CCC_PARAM"?

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