IMXRT1024 LPUART eDMA RAM Location and Limitation

[Lukas_Frank]

Hi all,

I am using eDMA with LPUART, I just read the RM. But I did not understand three point:

Q1: Is there a limitation for usage of LPUART eDMA? So, Can I use 8 of UARTS with eDMA and Does it effect performance?

Q2: I read eDMA use source and destination adresses to read/write datas. Which part of RAM eDMA writes their data? Is there a spesific area or use RAM area dynamically? If it use specific area what is the size that DMA can use? Where can I learn this from in RM?

Q3: In the figure 6.2 (functional description of eDMA) What is the meaning of “To/from crossbar switch”. Which area represent the RAM Side of data flow hierarchy? For example eDMA reads data from LPUART(Internal Peripheral bus in the figure 6.2) so where is the RAM representation?

Thanks and Regards.

[jeremyzhou]

Hi,
Thanks for your reply.
1) Can I use 8 of UARTS with eDMA and Does it effect performance?
-- Yes, you can, the DMA can handle the requests of 8 UARTS' transfer or receive to offload the CPU's work, it doesn't affect the performance.
2) Which part of RAM eDMA writes their data? Is there a spesific area or use RAM area dynamically? If it use specific area what is the size that DMA can use? Where can I learn this from in RM?
-- There's no address restriction for the RAM area, even, SDRAM is available too.
3) Q3: In the figure 6.2 (functional description of eDMA) What is the meaning of “To/from crossbar switch”. Which area represent the RAM Side of data flow hierarchy? For example eDMA reads data from LPUART(Internal Peripheral bus in the figure 6.2) so where is the RAM representation?
-- I don't think the 'To/from crossbar switch' has some special meaning, it seems like a 'bridge' to transfer data correctly.
I'd like to suggest you review the demo code in the SDK library to learn the DMA's operation mechanism.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou,

I just wonder which part of the block diagram is RAM side input/output represantation and which part of the UART side input/output represantation(or any other peripheral that uses eDMA). I look up the code but there is only write and read addresses,data’s and offsets. 

Thanks and Regards.

[jeremyzhou]

Hi,
For DMA, I don't think it has the concept of RAM side or UART side (peripheral side), its source or destination address can be RAM or peripheral.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou,

Then, what is the meaning of datas(Read Data and Write Data) that used by eDMA Engine Block of the Figure 6.1. Also, what is the meaning of Read Data and Write Data that used by Transfer Control Descriptor(TCD)  Block of Figure 6.1. What is the difference between them. That is not clearly understandable from RM.

Thanks and Regards.

[jeremyzhou]

Hi,
Thanks for your reply.
1）What is the difference between them?
-- No, they have the same meaning, read data means fetch data from the source address, the write data means to store data to the destination address.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou 

Q1: Then why we use two of them. There must be different usage purpose. Why one of them is writing/reading data to/from TCD and the other one is writing/reading data to/from eDMA engine.

Q2: Which address interval uses eDMA of RAM(OCRAM-Start Address:2020_0000 End Address:2023_FFFF).

Q3:I am just trying to monitor my RX/TX datas that written by LPUART_EDMA to the RAM. What should I do?

Thanks and Regards.

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Q1: Then why we use two of them. There must be different usage purpose. Why one of them is writing/reading data to/from TCD and the other one is writing/reading data to/from eDMA engine.
-- The DMA provides the scatter/gather feature that allows an eDMA channel to use multiple TCDs to implement a more flexible data transfer.
Q2: Which address interval uses eDMA of RAM(OCRAM-Start Address:2020_0000 End Address:2023_FFFF).
-- I'm not very clear with this question, please clarify it again.
Q3:I am just trying to monitor my RX/TX data written by LPUART_EDMA to the RAM. What should I do?
-- During the debug, the IDE can watch the values in the RAM.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou ,

Q1: Okey.

Q2: I just mean that, DMA uses RAM as we know, I am trying to view data that written to RAM in debug mode as you state Q3's answer. I know that in debug mode we can watch the values in the RAM, but my buffer data that written by LPUART_TransferSendDMA method in default eDMA example of SDK is not writing data to Destination Address (DADD). So, It is not in the RAM address interval. I am not able to watch it.

Q3:As I said above answer, I am aware I can watch datas written or readed by eDMA in debug mode. But, datas not seen in expected address interval in default SDK example? Could you help me about what is the missing point please ? I am just using default SDK example.

Thanks and Regards.

[jeremyzhou]

Hi,
1) But, data not seen in expected address interval in default SDK example? Could you help me about what is the missing point please ?
-- From my experience, it's impossible and whether you can tell me what the exact address of the destination address you set.
Have a great day,
TIC

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[jeremyzhou]

Hi,
Thanks for your reply.
1）Could you please approve whether if it is possible or not?
-- Yes.
Have a great day,
TIC

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[Lukas_Frank]

Hi @jeremyzhou,

I am not setting specific destination address, in default SDK example LPUART_EDMA, in debug time destination adress is setting as LPUART_Base. But as I know and research from internet. DMA uses RAM without CPU intervention so I just expecting it will get datas from RAM portion and send destination adress(LPUART base here).

I am just wondering now about whether eDMA uses RAM or not. It always is stated in RM as local memory. What is local memory? Is not it OCRAM? Or which portion of represent memory?

I am looking forward which memory use eDMA and which adress interval?

Thanks and Regards.

[jeremyzhou]

Hi,
1) What is local memory? Is not it OCRAM? Or which portion of represent memory?
-- In my opinion, the local memory contains the OCRAM, D/ITCM.
Have a great day,
TIC

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[Lukas_Frank]

Hi Dear @jeremyzhou,

Finally, I just wonder whether if it is possible "watching my LPUART EDMA Transfer Data(Send or Receive) in RAM while debugging in Memory Screen or any screen of MCUExpresso? Could you please approve whether if it is possible or not?

Thanks and Regards.

[Lukas_Frank]

Hi Dear @jeremyzhou ,

Thanks for your reply. 

Then, what is the meaning of datas(Read Data and Write Data) that used by eDMA Engine Block of the Figure 6.1. Also, what is the meaning of Read Data and Write Data that used by Transfer Control Descriptor(TCD)  Block of Figure 6.1. What is the difference between them. That is not clearly understandable from RM.

Thanks and Regards.