SRAM _DTC overflow and adjustment

[shu_liu]

Hi 

I am working on the project based on the azure_iot_embedded_sdk_adu and the board is MIMXRT1060. 

The SRAM_DTC is overflowed and .bss cannot fit in region "SRAM_DTC". I tried to double the SRAM_DTC to 256KB and decrease the SRAM_OC accordingly(below). After that, the debugger stop working and the error is "Active faults @ flexspi_nor_flash_ops.c [line 264]". Attached is the linker file.

1. How to fix this error and is it because of the memory conflicts ?

2. How to move the .bss from SRAM_DTC to SRAM_ITC since there is more space in ITC? Can it be done in the linker file attached?

Memory region Used Size Region Size %age Used
BOARD_FLASH: 355952 B 1 MB 33.95%
SRAM_DTC: 154684 B 256 KB 59.01%
SRAM_ITC: 2192 B 128 KB 1.67%
SRAM_OC: 0 GB 640 KB 0.00%
BOARD_SDRAM: 0 GB 30 MB 0.00%
NC_RAM_00: 4 KB 2 MB 0.20%
Finished building target: sample_azure_iot_embedded_sdk_adu.axf

[shu_liu]

Thanks for your reply.

I did not relocate the FlexRAM specifically and just used the default project settings. Attached are the init.scp, and debug launch. By the way, The board uses the bootloader  rt1060_sbl.bin.

[jeremyzhou]

Hi,
Thanks for your reply.
It needs to reallocate the FlexRAM to implement enlarge the DTCM's size instead of modifying the linker file.
So I'd like to suggest you refer to the post and application note to do it.
Have a great day,
TIC

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[shu_liu]

I followed the instructions to configure the FlexRAM and the debugger still failed to start. In the log below, the connect.scp configures the FlexRAM as well. Do I need to change the RAM settings in the connect.scp too and how? I attached the RT1060_SRAM_Init.scp in my last reply. 

Reconnected to existing LinkServer process.
============= SCRIPT: RT1060_connect.scp =============
RT1060 Connect Script
DpID = 0BD11477
APID = 0x04770041
Disabling MPU
Configure FlexRAM for 768KB OC RAM, 128KB I-TCM, 128KB D-TCM
Finished
============= END SCRIPT =============================

[jeremyzhou]

Hi，
Thanks for your reply.
1) Do I need to change the RAM settings in the connect.scp too and how?
-- Yes, of course, and please refer to the post to do it.
Have a great day,
TIC

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[shu_liu]

Jeremy,

I followed the link's instructions. When debugging, heap and stack usage seem normal, but it fails at HardFault_Handler when triggering memory related functions, like malloc and srand. 

I am wondering that there are still issues in memory settings. My board is MIMXRT1060-EVK. GPR17 register value:0x5AAFFAA5 and attached is the connection script for debugging.

FlexRAM settings:

DTC 256KB

ITC  128KB

OC  128KB + 512KB(reserved)

Please let me know if there are anything else I need to look into. Thanks.

LS

[jeremyzhou]

Hi,
Thanks for your reply.
According to your description, we can't jump to a conclusion that the hardfault issue is definitely related to FlexRAM reconfiguration.
In my opinion, you can try to figure out the root cause of hardfault issue via referring to the post.
Have a great day,
TIC

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[shu_liu]

I attached the project files. The project uses a hardcoded linker file instead of a generated one. It sets SRAM in it. Can you please take a look and see what changes I need to make in it other than the region size change. Thanks.

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
From my experience, the issue seems to be related to the reallocation of FlexRAM, so before answering your question, I was wondering if you can introduce the steps of reallocating the FlexRAM.
Looking forward to your reply.
Have a great day,
TIC

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