imxrt FlexCAN .

[emb01_jtronix]

Hi,

I am using MIMXRT1020-custom board with chip MIMXRT1021CAG4A and interfacing CAN1 and CAN2 on same board and I am expecting both the channels should receive and transmit data. I am using tool configuration to initialize flexcan in transfer mode. When I transmit data from one channel to another channel individually it works fine but when I try to use both the channel simultaneously to receive and transmit data it fails. what should I do to resolve this? Is there any flag which I have to clear or anything else please explain it will be helpful.

software using :MCUXpresso IDE v11.2.1 [Build 4149] [2020-10-07]

Thank you.

[Alexis_A]

Hello @emb01_jtronix,

Can you let me know the content of the register FLEXCANx_ESR1.FLT_CONF? Is possible that any of the interfaces is waiting to receive the messages that are in the bus, and a bus-off condition is triggered.

Remember that the CAN protocol retries to send the message until one module receives it. If this not happening the previous condition that I mention is called.

Best Regards,

Alexis Andalon

[emb01_jtronix]

content of the  FLEXCANx_ESR1 is 0x40080 so  FLEXCANx_ESR1.FLT_CONF is 00.

CAN2:

CAN1:

Thank you.

[Alexis_A]

Hello @emb01_jtronix,

Are you using remote frames while this error happens? Looking in the registers it looks like RRS is enabled.

Best Regards,
Alexis Andalon

[emb01_jtronix]

No, I am using data frame (kFLEXCAN_FrameTypeData).

Thank you.

[Alexis_A]

Hello @emb01_jtronix,

Would be possible to share a code using the EVK that I could test on my side?

Best Regards,

Alexis Andalon

[emb01_jtronix]

Thank you for reply.

void CAN_Test()
{
frame1.dataByte0 = 0;
frame1.dataByte1 = 1;
frame1.dataByte2 = 2;
frame1.dataByte3 = 3;
frame1.dataByte4 = 4;
frame1.dataByte5 = 5;
frame1.dataByte6 = 6;
frame1.dataByte7 = 7;

frame2.dataByte0 = 0;
frame2.dataByte1 = 1;
frame2.dataByte2 = 2;
frame2.dataByte3 = 3;
frame2.dataByte4 = 4;
frame2.dataByte5 = 5;
frame2.dataByte6 = 6;
frame2.dataByte7 = 7;

while(1)
{
frame1.id = FLEXCAN_ID_EXT(0x500);
frame1.format = kFLEXCAN_FrameFormatExtend;
frame1.type = kFLEXCAN_FrameTypeData;
frame1.length = 8;

txXfer1.mbIdx = CAN1_tx_mb_transfer.mbIdx;
txXfer1.frame = &frame1;

txComplete1 = false;
FLEXCAN_SetRxMbGlobalMask(CAN2_PERIPHERAL, FLEXCAN_RX_MB_STD_MASK(CAN2_rx_mb_config_11.id, 0, 0));
FLEXCAN_TransferSendNonBlocking(CAN1_PERIPHERAL, &CAN1_handle, &txXfer1);

while (!txComplete1);

rxXfer2.mbIdx = CAN2_rx_mb_transfer.mbIdx;
rxXfer2.frame = &frame2;

rxComplete2 = false;

FLEXCAN_TransferReceiveNonBlocking(CAN2_PERIPHERAL, &CAN2_handle, &rxXfer2);

while (!rxComplete2);

if((frame2.id == frame1.id)&&(frame1.dataByte0 ==frame2.dataByte0 )
&&(frame1.dataByte1 ==frame2.dataByte1 )
&&(frame1.dataByte2 ==frame2.dataByte2 )
&&(frame1.dataByte3 ==frame2.dataByte3 )
&&(frame1.dataByte4 ==frame2.dataByte4 )
&&(frame1.dataByte5 ==frame2.dataByte5 )
&&(frame1.dataByte6 ==frame2.dataByte6 )
&&(frame1.dataByte7 ==frame2.dataByte7 ))
{
passCount1++;
}
else
{
failCount1++;
}

frame1.dataByte0++;
frame1.dataByte1++;
frame1.dataByte2++;
frame1.dataByte3++;
frame1.dataByte4++;
frame1.dataByte5++;
frame1.dataByte6++;
frame1.dataByte7++;

frame2.id = FLEXCAN_ID_EXT(0x333);
frame2.format = kFLEXCAN_FrameFormatExtend;
frame2.type = kFLEXCAN_FrameTypeData;;
frame2.length = 8;

txXfer2.mbIdx = CAN2_tx_mb_transfer.mbIdx;
txXfer2.frame = &frame2;

txComplete2 = false;

FLEXCAN_SetRxMbGlobalMask(CAN1_PERIPHERAL, FLEXCAN_RX_MB_STD_MASK(CAN1_rx_mb_config_10.id, 0, 0));
FLEXCAN_TransferSendNonBlocking(CAN2_PERIPHERAL, &CAN2_handle, &txXfer2);

while (!txComplete2);

rxXfer1.mbIdx = CAN1_rx_mb_transfer.mbIdx;
rxXfer1.frame = &frame1;

rxComplete1 = false;
FLEXCAN_TransferReceiveNonBlocking(CAN1_PERIPHERAL, &CAN1_handle, &rxXfer1);

while (!rxComplete1);

if((frame2.id == frame1.id)&&
(frame1.dataByte0 == frame2.dataByte0 )
&&(frame1.dataByte1 == frame2.dataByte1 )
&&(frame1.dataByte2 == frame2.dataByte2 )
&&(frame1.dataByte3 == frame2.dataByte3 )
&&(frame1.dataByte4 == frame2.dataByte4 )
&&(frame1.dataByte5 == frame2.dataByte5 )
&&(frame1.dataByte6 == frame2.dataByte6 )
&&(frame1.dataByte7 == frame2.dataByte7 ))
{
passCount2++;
}
else
{
failCount2++;
}

frame2.dataByte0++;
frame2.dataByte1++;
frame2.dataByte2++;
frame2.dataByte3++;
frame2.dataByte4++;
frame2.dataByte5++;
frame2.dataByte6++;
frame2.dataByte7++;
}
}

CAN1 Settings:

CAN2 Settings:

[Alexis_A]

Hello @emb01_jtronix,

The issue that I see here is that one module is sending before the reception in the other is ready to receive. Try to change the order of this, something like this should work:

/* Start receive data through Rx Message Buffer. */
		rxXfer2.mbIdx = (uint8_t)RX_MESSAGE2_BUFFER_NUM;
		rxXfer2.frame = &frame2;
		(void)FLEXCAN_TransferReceiveNonBlocking(CAN2_PERIPHERAL, &flexcanHandle_2, &rxXfer2);

		frame1.id     = FLEXCAN_ID_STD(CAN2_RX_ID);
		frame1.format = (uint8_t)kFLEXCAN_FrameFormatStandard;
		frame1.type   = (uint8_t)kFLEXCAN_FrameTypeData;
		frame1.length = (uint8_t)DLC;
		txXfer1.mbIdx = (uint8_t)TX_MESSAGE1_BUFFER_NUM;
		txXfer1.frame = &frame1;
		(void)FLEXCAN_TransferSendNonBlocking(CAN1_PERIPHERAL, &flexcanHandle_1, &txXfer1);

		while(!txComplete_1 & rxComplete_2);

Let me know if this helps you.

Best Regards,

Alexis Andalon

[emb01_jtronix]

Thank you for reply.

I try this logic and run my program but still communication not happening. data is receive only one time(rx meassage buffer idle for once) and after that rx message buffer is not idle again (kStatus_FLEXCAN_RxIdle).

[Alexis_A]

Hello @emb01_jtronix,

Due to the pin limitation in the EVK, I couldn't test this in the RT1020 but the attached project for the RT1050 shows how to use the two interfaces and the implementation in the RT1020 should be very similar.

Best Regards,

Alexis Andalon

[emb01_jtronix]

Waiting for reply.

Thank you