I'm working with ENET_QOS on a custom board, following the 'evkmimxrt1170_lwip_ping_enet_qos_freertos_cm7' example.
The strange behaviour is this: sometimes, when I simply remove the ethernet cable, the processor keeps triggering the ENET_QOS_IRQHandler non-stop (with DMA_INTERRUPT_STATUS == 0) until the watchdog reboots the uC.
Since DMA_INTERRUPT_STATUS register value is 0, the function ENET_QOS_CommonIRQHandler (assigned as the ISR handler on s_enetqosIsr) just goes straight through, without going into any of the 'if' statements.
This is the state of the registers when the ISR triggers:
DMA_INTERRUPT_STATUS 0x0
MAC_INTERRUPT_ENABLE 0x0
MAC_INTERRUPT_STATUS 0x21
MTL_INTERRUPT_STATUS 0x0
DMA_CH0_INTERRUPT_ENABLE 0x8041
DMA_CH0_STATUS 0x404
I tried clearing the DMA_CH0_STATUS register inside the ISR, but it remained 0 afterwards and ISRs kept triggering:
// Clear STATUS for channel 0
base->DMA_CH[0].DMA_CHX_STAT |= base->DMA_CH[0].DMA_CHX_STAT;
Then I tried clearing the bits on MAC_INTERRUPT_STATUS. It seems that clearing bit 5 (LPIIS) solves the ISR spam:
volatile uint32_t discard;
// read MAC_LPI_CONTROL_STATUS to clear MAC_INTERRUPT_STATUS bit 5 (0x20)
discard = base->MAC_LPI_CONTROL_STATUS;
(void)discard;
But it doesn't make sense, as this interrupt is not even enabled in MAC_INTERRUPT_ENABLE. What could explain this behaviour?
