Hi Allen,
Unlike i.MX6 devices which are powered by a Cortex-A processor, the MXRT features a Cortex M7 core. And the FPU is provide by the core, so it is different.
In chapter 12 of Reference manual (https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf ) you can find the following:
The ARM Cortex-M7 Platform supports the following:
• 32 KB L1 Instruction Cache
• 32 KB L1 Data Cache
• Floating Point Unit (FPU) with support for the FPv5 architecture
• Internal Trace (TRC)
Regarding to the PMU question, in i.MX devices PMU is the Power management Unit and I dont think there is an equivalent for Performance Monitoring Unit.
Regards,
Carlos
NXP Technical Support
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