Using 32M flash in i.mxrt1062

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Using 32M flash in i.mxrt1062

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AndrewChoi
Contributor I

Hello All

 

My customer is using 32M flash on i.mxrt1062.

I confirmed in a previous post that 32M support is available.

https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/QSPI-Flash-Size-MIMXRT1062/m-p/2193977#M35489

And,
https://github.com/nxp-mcuxpresso/mcux-component/blob/release/26.03.00/flash/mflash/mimxrt1160/mflas...

it was confirmed that the addressing is set to 3 bytes,

LEXSPI_LUT_SEQ(

kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03,

kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18
)

so the customer is currently using a modified file.

Please let me know if NXP has any plans or schedules for officially supporting 4-byte addressing.

Thank you

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Gavin_Jia
NXP TechSupport
NXP TechSupport

Hi @AndrewChoi ,

Thanks for your interest in NXP MIMXRT series!

The FlexSPI address space of the i.MX RT1062 inherently supports QSPI NOR flash memory larger than 16 MB. However, the publicly available MCUXpresso component code is primarily tailored to the flash memory used on the official EVK. Therefore, no code specific to 4-byte addressing is provided.
Customers should perform joint adaptation and verification of the FCB, LUT, flashloader/download algorithms, and boundary access beyond 16 MB based on the specific Flash.

Unfortunately, there are currently no plans to release an official SDK that supports this feature. We apologize for any inconvenience this may cause. You can also find more details provided by developers in this thread: https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Add-4-byte-addressing-to-FLEXSPI-flash-driver/m-...

Best regards,
Gavin

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