RT600 --- data exchange between DSP and MCU in shared memory

[zhang2018tz]

I am working on RT600 dev board (ekvmimxrt685). I've successfully evaluated the demo program of MU (inter core communication). Then I intend to evaluate inter core communication through the shared memory.

The very basic thing I intended to do is: DSP writes a value to a position. (such as put 0x12345678 to address 0x40000). Then MCU checks if it can see 0x12345678 at address 0x40000.

I found MCU could ONLY see the data that DSP writes at 0x24000000 (TCM) space. 

Then I know cache matters. And I have the following lines (in the DSP's program) before this "writng data" test: 

/* Disable DSP cache for noncacheable sections. */
xthal_set_region_attribute((uint32_t *)&NonCacheable_start,
(uint32_t)&NonCacheable_end - (uint32_t)&NonCacheable_start, XCHAL_CA_BYPASS, 0);
xthal_set_region_attribute((uint32_t *)&NonCacheable_init_start,
(uint32_t)&NonCacheable_init_end - (uint32_t)&NonCacheable_init_start, XCHAL_CA_BYPASS,
0);

But it made me really confused, even space 0x20040000 (and following 256kbyte) are set to uncached, I still could not let MCU see DSP's writing data at 0x20040000.

Looking forward to have some support from this forum.

[kerryzhou · Accepted solution]

Hi zhang tz ,

  Thanks for your interest in the NXP MIMXRT product, I would like to provide service for you.

   Could you tell me which code you are using now? The SDK or your own code?

  Can you share the testing code, then I can help you to check the details about the MIMXRT685-EVK.

If you still have questions about it, please kindly let me know.

Kerry

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[zhang2018tz]

Hi Kerry,

THanks for your reply! The code that I was testing with is the SDK demo programs,, and the platform is NXP official RT600 demo board.

Regarding the topic of this post, it suddenly became OK! I opend the DSP audio demo program (both MCU side and DSP side), I added the codes that doing the things that I said in my first post here. It just worked as I expected: MCU can see the data that DSP writes (within the noncache space).

THanks again for your attention!

[kerryzhou]

Hi zhang tz,

  Thanks for your updated information, and I am glad to hear you already OK.

  So, if your question is closed, please help to mark the correct answer, just to close this case, thanks.

If you still have questions about it, please kindly let me know.

Kerry

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Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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