Multiple reads/writes occurring unexpectedly with SEMC PSRAM IMXRT1060

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Multiple reads/writes occurring unexpectedly with SEMC PSRAM IMXRT1060

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nxp16
Contributor III

Hi,

We're using SEMC PSRAM mode to access an FPGA.  For some reason, whenever we access only one address inside our code, the 1060 accesses somewhere around 6 or so addresses before/after that address.  I couldn't find anything in the reference manual about this.  Does anyone have any idea how to stop this from happening?

Thanks,

-m

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nxp16
Contributor III

We have it connected as an external 16-bit sram.  We access it either as 16-bits or 32-bits.  I.e. *((uint16_t *)0x88000000) = 0xfeed will store 0xfeed at address 0

Here is the config I'm using with the SEMC api:

static semc_sram_config_t fpgaConfig = {0};

void SEMCPeriph_init(void) {
  // Setup FPGA
  fpgaConfig.cePinMux = kSEMC_MUXCSX0;
  fpgaConfig.address = 0x88000000;
  fpgaConfig.memsize_kbytes = 64 * 1024;
  fpgaConfig.portSize = kSEMC_PortSize16Bit;
  fpgaConfig.burstLen = kSEMC_Nor_BurstLen1;
  fpgaConfig.addr27 = kSEMC_MORA27_NONE;
  fpgaConfig.tCeSetup_Ns = 20;                   /*!< The CE setup time. */
  fpgaConfig.tCeHold_Ns = 20;                    /*!< The CE hold time. */
  fpgaConfig.tCeInterval_Ns = 40;                /*!< CE interval minimum time. */
  fpgaConfig.tAddrSetup_Ns = 40;                 /*!< The address setup time. */
  fpgaConfig.tAddrHold_Ns = 40;                  /*!< The address hold time. */
  fpgaConfig.tWeLow_Ns = 40;                     /*!< WE low time for async mode. */
  fpgaConfig.tWeHigh_Ns = 40;                    /*!< WE high time for async mode. */
  fpgaConfig.tReLow_Ns = 40;                     /*!< RE low time for async mode. */
  fpgaConfig.tReHigh_Ns = 40;                    /*!< RE high time for async mode. */
  fpgaConfig.tTurnAround_Ns = 40;                /*!< Turnaround time for async mode. */
  fpgaConfig.tAddr2WriteHold_Ns = 40;            /*!< Address to write data hold time for async mode. */
  fpgaConfig.addrMode = kSEMC_AddrDataMux;
  SEMC_ConfigureSRAM(SEMC, &fpgaConfig, semcClock);
}

Thanks,

-m

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1,325 Views
nxp16
Contributor III

Nevermind.  I just found my answer here:

https://community.nxp.com/thread/480912 

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Sabina_Bruce
NXP Employee
NXP Employee

I'm glad that you were able to resolve this!

Best Regards,

Sabina

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Sabina_Bruce
NXP Employee
NXP Employee

Hello Mike,

Hope you are doing well.

Could you please provide more information on your environment, so that I may try to help you pin point the root of the issue. How did you connect it? Are you using your own code or the SDK to initialize and work with read and write functions? If possible can you provide code snippets to see how it is being done.

Best Regards,

Sabina

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