How to set USB_OTG1_PWR

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How to set USB_OTG1_PWR

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expertsleepers
Contributor III

Taking the iMXRT1010 as a specific example, section 35.3 of the reference manual defines three signals belonging to the USB controller:

  • USB_OTG1_ID (input)
  • USB_OTG1_OC (input)
  • USB_OTG1_PWR (output)

USB_OTG1_ID is sampled and appears in the USB_nOTGSC register.

USB_OTG1_OC appears in the OCA field of the USB_nPORTSC register.

How is USB_OTG1_PWR controlled? I don't see any register field which controls this output.

 

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @expertsleepers,

For USB_OTG1_PWR, you can use either GPIO or USB IP to control.

There are two registers related to USB_OTG1_PWR:

1. USB OTG Control 1 Register (CTRL1), PWR_POL bit field to control the output polarity.
2. Port Status & Control (PORTSC1), PP bit to enable it.

 

The following code on RT1010 can be taken as reference 

USBNC->USB_OTGn_CTRL |= USBNC_USB_OTGn_CTRL_PWR_POL_MASK;
USBNC->USB_OTGn_CTRL &= (~USBNC_USB_OTGn_CTRL_PWR_POL_MASK);

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @expertsleepers,

This signal is used to control the power supply to the USB VBUS line. In USB OTG applications, the device may act as a host and needs to provide power to the connected USB device. The USB_OTG1_PWR signal is typically connected to a Power Management IC (PMIC) or a power switch that enables or disables VBUS power.

As mentioned on the following post (USB_OTG1_PWR, OC & VBUS - NXP Community "USB_OTGx_PWR is the logic output, operating as GPIO to control an external switch that provides the in-system VBUS power in Host mode."

BR,
Edwin.

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expertsleepers
Contributor III

Thanks, but I already understand the purpose of the signal. What I was asking is, how is the signal controlled in software?

What causes USB_OTG1_PWR to be set or not set?

 

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @expertsleepers,

It is operated as a GPIO output, meaning that the developer is responsible of setting it when they intend to send a signal though this pin.

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expertsleepers
Contributor III

If that's the case, why does it appear as a specific signal in the MUX? (GPIO_AD_00 and GPIO_AD_12 for the iMXRT1010). Surely any GPIO could be used?

Say I have USB_OTG1_PWR assigned to GPIO_AD_00 in the MUX. Which register would I write to change the output signal?

 

 

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1,061 Views
EdwinHz
NXP TechSupport
NXP TechSupport

Hi @expertsleepers,

For USB_OTG1_PWR, you can use either GPIO or USB IP to control.

There are two registers related to USB_OTG1_PWR:

1. USB OTG Control 1 Register (CTRL1), PWR_POL bit field to control the output polarity.
2. Port Status & Control (PORTSC1), PP bit to enable it.

 

The following code on RT1010 can be taken as reference 

USBNC->USB_OTGn_CTRL |= USBNC_USB_OTGn_CTRL_PWR_POL_MASK;
USBNC->USB_OTGn_CTRL &= (~USBNC_USB_OTGn_CTRL_PWR_POL_MASK);

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1,015 Views
expertsleepers
Contributor III
Thanks, that's what I was missing.
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%3CLINGO-SUB%20id%3D%22lingo-sub-2174985%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EHow%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2174985%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3ETaking%20the%20iMXRT1010%20as%20a%20specific%20example%2C%20section%2035.3%20of%20the%20reference%20manual%20defines%20three%20signals%20belonging%20to%20the%20USB%20controller%3A%3C%2FP%3E%3CUL%3E%3CLI%3EUSB_OTG1_ID%20(input)%3C%2FLI%3E%3CLI%3EUSB_OTG1_OC%20(input)%3C%2FLI%3E%3CLI%3EUSB_OTG1_PWR%20(output)%3C%2FLI%3E%3C%2FUL%3E%3CP%3EUSB_OTG1_ID%20is%20sampled%20and%20appears%20in%20the%26nbsp%3BUSB_nOTGSC%20register.%3C%2FP%3E%3CP%3EUSB_OTG1_OC%20appears%20in%20the%20OCA%20field%20of%20the%20USB_nPORTSC%20register.%3C%2FP%3E%3CP%3EHow%20is%26nbsp%3BUSB_OTG1_PWR%20controlled%3F%20I%20don't%20see%20any%20register%20field%20which%20controls%20this%20output.%3C%2FP%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E%3CLINGO-LABS%20id%3D%22lingo-labs-2174985%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CLINGO-LABEL%3Ei.MXRT%20101x%3C%2FLINGO-LABEL%3E%3C%2FLINGO-LABS%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2179158%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20How%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2179158%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EThanks%2C%20that's%20what%20I%20was%20missing.%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2178942%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20How%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2178942%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHi%26nbsp%3B%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fuser%2Fviewprofilepage%2Fuser-id%2F213907%22%20target%3D%22_blank%22%3E%40expertsleepers%3C%2FA%3E%2C%3C%2FP%3E%0A%3CP%3EFor%26nbsp%3BUSB_OTG1_PWR%2C%20you%20can%20use%20either%20GPIO%20or%20USB%20IP%20to%20control.%3C%2FP%3E%0A%3CP%3EThere%20are%20two%20registers%20related%20to%20USB_OTG1_PWR%3A%3C%2FP%3E%0A%3CP%3E1.%20USB%20OTG%20Control%201%20Register%20(CTRL1)%2C%26nbsp%3BPWR_POL%20bit%20field%20to%20control%20the%20output%20polarity.%3CBR%20%2F%3E2.%20Port%20Status%20%26amp%3B%20Control%20(PORTSC1)%2C%26nbsp%3BPP%20bit%20to%20enable%20it.%3C%2FP%3E%0A%3CBR%20%2F%3E%0A%3CP%3EThe%20following%20code%20on%20RT1010%20can%20be%20taken%20as%20reference%26nbsp%3B%3C%2FP%3E%0A%3CP%3E%3CSPAN%3EUSBNC-%26gt%3BUSB_OTGn_CTRL%20%7C%3D%20USBNC_USB_OTGn_CTRL_PWR_POL_MASK%3B%3C%2FSPAN%3E%3CBR%20%2F%3E%3CSPAN%3EUSBNC-%26gt%3BUSB_OTGn_CTRL%20%26amp%3B%3D%20(~USBNC_USB_OTGn_CTRL_PWR_POL_MASK)%3B%3C%2FSPAN%3E%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2178667%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20How%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2178667%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EIf%20that's%20the%20case%2C%20why%20does%20it%20appear%20as%20a%20specific%20signal%20in%20the%20MUX%3F%20(GPIO_AD_00%20and%20GPIO_AD_12%20for%20the%20iMXRT1010).%20Surely%20any%20GPIO%20could%20be%20used%3F%3C%2FP%3E%3CP%3ESay%20I%20have%26nbsp%3BUSB_OTG1_PWR%20assigned%20to%26nbsp%3BGPIO_AD_00%20in%20the%20MUX.%20Which%20register%20would%20I%20write%20to%20change%20the%20output%20signal%3F%3C%2FP%3E%3CBR%20%2F%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2178427%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20How%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2178427%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHi%26nbsp%3B%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fuser%2Fviewprofilepage%2Fuser-id%2F213907%22%20target%3D%22_blank%22%3E%40expertsleepers%3C%2FA%3E%2C%3C%2FP%3E%0A%3CP%3EIt%20is%20operated%20as%20a%20GPIO%20output%2C%20meaning%20that%20the%20developer%20is%20responsible%20of%20setting%20it%20when%20they%20intend%20to%20send%20a%20signal%20though%20this%20pin.%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2177984%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20How%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2177984%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EThanks%2C%20but%20I%20already%20understand%20the%20purpose%20of%20the%20signal.%20What%20I%20was%20asking%20is%2C%20how%20is%20the%20signal%20controlled%20in%20software%3F%3C%2FP%3E%3CP%3EWhat%20causes%26nbsp%3B%3CSPAN%3EUSB_OTG1_PWR%20to%20be%20set%20or%20not%20set%3F%3C%2FSPAN%3E%3C%2FP%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2177673%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20How%20to%20set%20USB_OTG1_PWR%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2177673%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHi%26nbsp%3B%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fuser%2Fviewprofilepage%2Fuser-id%2F213907%22%20target%3D%22_blank%22%3E%40expertsleepers%3C%2FA%3E%2C%3C%2FP%3E%0A%3CP%3EThis%20signal%20is%20used%20to%20control%20the%20power%20supply%20to%20the%20USB%20VBUS%20line.%20In%20USB%20OTG%20applications%2C%20the%20device%20may%20act%20as%20a%20host%20and%20needs%20to%20provide%20power%20to%20the%20connected%20USB%20device.%20The%20USB_OTG1_PWR%20signal%20is%20typically%20connected%20to%20a%20Power%20Management%20IC%20(PMIC)%20or%20a%20power%20switch%20that%20enables%20or%20disables%20VBUS%20power.%3C%2FP%3E%0A%3CP%3EAs%20mentioned%20on%20the%20following%20post%20(%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fi-MX-RT-Crossover-MCUs%2FUSB-OTG1-PWR-OC-VBUS%2Fm-p%2F892357%22%20target%3D%22_blank%22%3EUSB_OTG1_PWR%2C%20OC%20%26amp%3B%20VBUS%20-%20NXP%20Community%3C%2FA%3E%3CLI-EMOJI%20id%3D%22lia_disappointed-face%22%20title%3D%22%3Adisappointed_face%3A%22%3E%3C%2FLI-EMOJI%3E%20%22%3CSPAN%3EUSB_OTGx_PWR%20is%20the%20logic%20output%2C%20operating%20as%20GPIO%20to%20control%20an%20external%20switch%20that%20provides%20the%20in-system%20VBUS%20power%20in%20Host%20mode.%3C%2FSPAN%3E%22%3C%2FP%3E%0A%3CP%3EBR%2C%3CBR%20%2F%3EEdwin.%3C%2FP%3E%3C%2FLINGO-BODY%3E