Hardware trigger with ADC2

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Hardware trigger with ADC2

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kurt_staubli
Contributor III

As others I struggle with hardware trigger of ADCs.

My base was NXP's example adc_etc_hardware_trigger_conv. It works as expected. 

Next I tried to do the same but use ADC2 instead of ADC1. I  didn't get any interrupts. I used trigger 4 instead of trigger 0 and I added an interrupt handler for ADC_ETC_ERROR. I received periodically ADC_ETC_ERROR but no  ADC_ETC_IRQ0/1 as expected.

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jeremyzhou
NXP Employee
NXP Employee

Hi Kurt Staubli,

Thank you for your interest in NXP Semiconductor products and
the opportunity to serve you.
To provide the fastest possible support, I'd like to suggest you refer to the post which is a similar question on our NXP community.

i.MXRT1060 ADC external trigger (ADC_ETC) for ADC 2 

TIC

 

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kurt_staubli
Contributor III

Hi jeremyzhou Mitarbeiter

Thank you for your answer.

i.MXRT1060 ADC external trigger (ADC_ETC) for ADC 2

did not help me, since its solution (use XBAR1, instead of XBAR0) was already implemented in the original example adc_etc_hardware_trigger_conv and I did not change it.

Kurt

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jeremyzhou
NXP Employee
NXP Employee

Hi Kurt Staubli,

Thanks for your reply.
I was wondering if you can share a compile-able demo that can replicate the issue, as I'd like to do some testing by myself.

TIC

 

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kurt_staubli
Contributor III

Hi jeremyzhou Mitarbeiter

I have solved the problem.

The orignial example is adc_etc_hardware_trigger_conv. I have just the changed files in the attachment. As hardware I am using EmbeddedArtist's RT1060 Evaluation board. The difference to NXP's evaluation board is that EA's board has much more IOs for the user.

Kurt

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ohmjke
Contributor II

Thank you @kurt_staubli 

It helped me with the same problem on RT1024.

Solution - change the default value of enableTSCBypass from "true" to "false";

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