Hello.
I am using the RT1020 processor.
In my test , I am sending 32 bytes message ,these message i receive using DMA uart .When I look at the data received, the last byte is at the first place, always. There is never any other or additional shift.
I can understand it is byte remaining from the previous comm and missed out from the previous reading but why is it so stable (always one byte and always the correct one).
Correct byte sent
22, 0, 0, 0,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, F,54,26,4E,
but I received bytes
4E,22, 0, 0, 0,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, F,54,26,
why it is happening .
Below is initialization of DMA uart
#if defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT
/* Init DMAMUX */
DMAMUX_Init(EXAMPLE_LPUART_DMAMUX_BASEADDR);
/* Set channel for LPUART */
DMAMUX_SetSource(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_TX_DMA_CHANNEL, LPUART_TX_DMA_REQUEST);
DMAMUX_EnableChannel(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_TX_DMA_CHANNEL);
DMAMUX_SetSource(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_RX_DMA_CHANNEL, LPUART_RX_DMA_REQUEST);
DMAMUX_EnableChannel(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_RX_DMA_CHANNEL);
#endif
/* Init the EDMA module */
//EDMA_GetDefaultConfig(&DMA0_config);
EDMA_Init(EXAMPLE_LPUART_DMA_BASEADDR, &DMA0_config);
LPUART_GetDefaultConfig(&lpuartConfig);
lpuartConfig.baudRate_Bps = UART3_BAUDRATE;
lpuartConfig.enableTx = true;
lpuartConfig.enableRx = true;
LPUART_Init(DEMO_LPUART, &lpuartConfig, DEMO_LPUART_CLK_FREQ);
EDMA_CreateHandle(&g_lpuartTxEdmaHandle, EXAMPLE_LPUART_DMA_BASEADDR, LPUART_TX_DMA_CHANNEL);
EDMA_CreateHandle(&g_lpuartRxEdmaHandle, EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL);
/* Create LPUART DMA handle. */
LPUART_TransferCreateHandleEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, LPUART_UserCallback, NULL, &g_lpuartTxEdmaHandle,
&g_lpuartRxEdmaHandle);
/* Channel CH0 initialization */
/* Set the DMA 0 channel priority */
// EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR, DMA0_CH0_DMA_CHANNEL, &DMA0_CH0_preemption_config);
// /* Channel CH1 initialization */
// /* Set the DMA 1 channel priority */
// EDMA_SetChannelPreemptionConfig(EXAMPLE_LPUART_DMA_BASEADDR, DMA0_CH1_DMA_CHANNEL, &DMA0_CH1_preemption_config);
/* Interrupt vector DMA0_DMA16_IRQn priority settings in the NVIC. */
NVIC_SetPriority(DMA0_DMA_CH_INT_DONE_0_IRQN, DMA0_DMA_CH_INT_DONE_0_IRQ_PRIORITY);
/* Interrupt vector DMA0_DMA17_IRQn priority settings in the NVIC. */
NVIC_SetPriority(DMA0_DMA_CH_INT_DONE_1_IRQN, DMA0_DMA_CH_INT_DONE_1_IRQ_PRIORITY);
Hi @Sam_Gao
Hello @hanmant,
Sorry for the delayed response. Using the SDK (version 25.03) example called "lpuart_edma_transfer," I modified the macro named ECHO_BUFFER_LENGTH to 32, and it is working correctly. Please ensure that your DMA is properly configured, especially the function called LPUART_SendEDMA. It is likely that the number of major loops is set lower than the buffer size.
BR
Habib
Hi @all,
waiting for response