Does RT1064 interrupts have priority levels?

[ping1]

I cannot find any information on datasheet.

Thanks

Ping

[mjbcswitzerland · Accepted solution]

Hi

Each interrupt's priority level is configured in the core's NVIC (0..15) - you need to use ARM documentation for core details.

Eg. https://developer.arm.com/documentation/dui0646/a/cortex-m7-peripherals/nested-vectored-interrupt-co...

Regards

Mark
[uTasker project developer for Kinetis and i.MX RT]

[ping1]

Thank you for information!