pwm changes randomly

[sajiddalvi]

Have a custom board based on imx6ul.

I am using PWM2 output on ENET1_RX_DATA1.

When I set 

echo 0 > /sys/class/pwm/pwmchip1/export

echo 1 > /sys/class/pwm/pwmchip1/pwm0/enable

echo 2500 > /sys/class/pwm/pwmchip1/pwm0/period

echo 1250 > /sys/class/pwm/pwmchip1/pwm0/duty_cycle

on the scope I see 100KHz at 50% duty cycle most of the time.

However, once every few seconds I see bursts of 400KHz at 50% duty cycle

Can't figure out what's causing these random bursts.

This is my device tree change imx6ul-14x14-evk.dts :

pinctrl_pwm2: pwm2grp {
   fsl,pins = <MX6UL_PAD_ENET1_RX_DATA1__PWM2_OUT 0x110b0>;
};

&pwm2 {
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_pwm2>;
   status = "okay";
};

I also made this change in arch/arm/boot/dts/imx6ul.dtsi

pwm2: pwm@02084000 {
compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
reg = <0x02084000 0x4000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_PWM2>,
<&clks IMX6UL_CLK_PWM2>;
clock-names = "ipg", "per";
#pwm-cells = <2>;
};

[sajiddalvi]

Igor

Why would the clock go faster in low power modes?

BTW : I saw this same behavior on the scope when I monitored the backlight pwm1 output.

Also where would I check/set this register in code?

I am currently relying on the stock pwm driver that comes with the imx6ul Evk.Sajid

[igorpadykov]

What BSP used in the case, is it official NXP BSP from

i.MX 6 Series Software and Development Tool|NXP 

One can check pwm source clock in PWMx_PWMCR[CLKSRC]

and output it using CCM_CCOSR register, check it with oscilloscope.

Some processor clocks may be changed due to CPU Freq governor,

one can try to change it to Performance and check if issue will persist

why the system work at ondemand? 

~igor

[igorpadykov]

Hi sajid

one can check if pwm is enabled in low power modes:

PWMx_PWMCR[WAITEN], DOZEN,STOPEN

and its clocks activity CGR value in CCM_CCGR4 register.

Best regards
igor
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