Hi,
MIPI DSI clock output is discontinued after reset/setup of jd9365da display panel connected to imx8mm core based board. Attached oscilloscope signal screenshot for reference along with boot log. GPIO reset sequence in screen shot is OK but mipi dsi clock signal is discontinued and +ve/-ve sequence is also wrong. MIPI dsi pixel clock and corresponding d-phy bit clocks seems initialized with respective values i.e ~70 Mhz and 415 Mhz . Since MIPI DSI clock output is not generated hence display is also blank with thick whitish color on panel. Attached jd9365da panel driver code for reference. Please let me know if you have input on why there is no ouptut for MIPI DSI clock?
rgds
kot
Hi,
Thank you for your interest in NXP Semiconductor products,
Please review that the clock is properly started up
clk_disable_unprepare(lcdifv3->clk_pix);
clk_set_rate(lcdifv3->clk_pix, vmode->pixelclock);
clk_prepare_enable(lcdifv3->clk_pix);
And also that the specified speed is covered in SW for the selected PLL.
Regards
Dear Joseph
Thank you for your reply.
clk_disable_unprepare(lcdifv3->clk_pix); clk_set_rate(lcdifv3->clk_pix, vmode->pixelclock); clk_prepare_enable(lcdifv3->clk_pix);
my code is using lcdif version code , so added debug log in lcdif function lcdif_crtc_mode_valid() (drivers/gpu/drm/imx/lcdif/lcdif-crtc.c) to check if vmode->pixelclock i.e ~70 mhz is set in clk_set_rate(). Exact clock rate of 69.3 mhz is retrieved in lcdif_crtc_mode_valid() function.
>>And also that the specified speed is covered in SW for the selected PLL.
can you please provide bit more details about it? as per my idea, pixel clock in jd9365da driver code is set to ~70 Mhz according to display parameters (800 *1280) and dsim->bit_clk is calculated in sec_mipi_dsim_check_pll_out(drivers/gpu/drm/bridge/sec-dsim.c) is ~420 Mhz . is PLL different from dsim->bit_clk?
Attached latest bootlog for reference.
Rgds
kot
Dear joseph,
could you please provide your input on my latest comment i posted last week as i blocked in enabling mipi dsi clock and display panel is just showing nothing but whitish color. according to below imx8mm.dtsi.
SYS_PLL1_266M is declared dsi clock and on target board, it is configured successfully
but still mipi dsi clock is not ticking continuously as mentioned in the description and in attached picture. Due to dsi clock tick failure, observed below timeout issue triggered from lcdif_drm_atomic_commit_tail().
{{
drm_atomic_helper_wait_for_vblanks()
[ 13.539567] [CRTC:33:crtc-0] vblank wait timed out
}}
regards
kot