imx6s can not putout clk

[王剑翰]

The board is designed by our customer and the reference schematics is SPF-27516_C3 (Sabre_SDB board).

They download the images to eMMC on board. But they can not boot from eMMC. And they check the input power and OSC signal is normal.

But they can not find the eMMC's clk signal and other putout clk.

I don't know how to check the root cause. Could you give me some advise?

[igorpadykov]

Hi 王 剑翰

could you provide more details:

what is processor, where did you get images

and what was method for "download the images to eMMC on board" ?

Shortly one needs to use web page for specific processor, for example

for i.MX6S:

i.MX6S|i.MX 6Solo Processors|Multimedia|Freescale

Here you will find BSPs:

"Operating System Software-Board Support Packages (30) "

MFG Tool:

"Programmers (Flash, etc.) (6) "

SDK for testing hardware (one can ru it with jtag)

i.MX 6Series Platform SDK : Bare-metal SDK for the i.MX 6 series

For new board one needs to test DDR, find new DDR settings,

build new image with new DDR settings

https://community.freescale.com/docs/DOC-96412

Best regards

igor

[王剑翰]

Hi igor

Thank you for your kindly reply.

CPU P/N is MCIMX6S5EVM10AB; The image is designed by customer own; They also used mfgtool to download the image to eMMC on board.

But I can not understand why the cpu can not putout the clk while the input power and OSC signal is normal.

Customer had producted about 20 pcs boards. Only 5pcs failed with this phenomenon.

[igorpadykov]

Hi 王 剑翰

This may be just poor soldering or bad contact issue and

recommended to check signals by oscilloscope.

I would suggest to update (find new DDR settings)

for these boards, then rebuild new image with new DDR settings

https://community.freescale.com/docs/DOC-96412

Also one can try boot SDK and run from OCRAM

https://community.freescale.com/docs/DOC-95853

~igor

[王剑翰]

Hi  igor,

I am sorry.

1, I don't know which else signals need to be checked again. Customer had checked some clk signals and found no clk put out while the input power and crystal oscillator signal input is normal.

2, If it is due to poor soldering or bad contact, eMMC will also not receive any clk from CPU, so the image downloading will can not be successful. If my understanding is wrong, please kindly correct me.

3, I also don't understand why need to update the DDR setting. If the codes can be copied into DDR, I think eMMC also must get the clk signal first from CPU.

I will communicate your kindly advice to customer. But I still be confused about the above questions, please kindly make me clear about them, thank you!

[igorpadykov · Accepted solution]

Hi 王 剑翰

no problems, in fact there are no strict rules

for debugging such kind of issues, in any way it is

always some kind experimentation.

- one can try to reset POR (without removing power), will it boot or not

- attach jtag debugger and check SRC_SBMR1,2 registers -

they should show correct boot settings

- after boot failure, please connect the OTG on the board to the PC, if a new HID

device can be found,  the ROM code enter serial download mode which mean

some error occurred in the booting process. One can also check with MFG Tool,

if it sees i.MX6 device.

Then attach the board with any JTAG debugger, such as RV-ICE or

Lauterbach and dump 0x907400 (ROM uses 0x907000 as starting address),

you should see your IVT header here if the SD/eMMC access is ok.

~igor