hi, all
i encountered a problem that when i boot system , sometimes have the following error :
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android_work: sent uevent USB_STATE=CONNECTED
android_usb gadget: high speed config #1: android
android_work: sent uevent USB_STATE=CONFIGURED
imx-ipuv3 imx-ipuv3.0: IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7)
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_10 = 0x00080000
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_5 = 0x00800000
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
ehci_fsl_bus_suspend begins, Host 1
ehci_fsl_bus_suspend ends, Host 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
----------------------------------------------------------------------------------------
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_10 = 0x00080000
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_5 = 0x00800000
i checked the Error Interrupts Summary table in RM Table 37-35 ,
it shows IPU_INT_STAT_10 error is occurred DI0 (DI0_SYNC_DISP_ERR)
and IPU_INT_STAT_5 error is occurred IDMAC (IDMAC_NFB4EOF_ERR_23).
i don't always reproduce the issue.
sometimes it's OK or the issue occurs during the system boot.
and sometimes,it's ok during the system boot, but after several seconds, system will reboot and the issue will occur.
please tell me how to fix it
Original Attachment has been moved to: ipu_error.log.zip
解決済! 解決策の投稿を見る。
Hi Fang, I double checked your boot log, there is only one IPU preoble information at first:
Freescale USB OTG Driver loaded, $Revision: 1.55 $
imx-ipuv3 imx-ipuv3.1: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)
MIPI CSI2 driver module loaded
That means ipu bypass reset is still working although you had disabled the CONFIG_MX6_CLK_FOR_BOOTUI_TRANS, please remove "fb0base=0x27b00000" from your boot command line, this will make IPU plat_data->bypass_reset be false, then IPU will always be fully initialized.
The mentioned IPU error interrupts are "panic" and mainly concerns with IPU throughput problem.
One can try to decrease screen resolution and / or frame rate. Also, other system resource consuming
processes, such as VPU / USB / SD / SATA transfer, may affect. As result a general performance
issue may take place in the case. In the same time You wrote, that the warnings take place at boot ;
perhaps, if we do not see such messages later during system work - it makes sense to leave the issue
as is.
Have a great day,
Yuri
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hi, Yuri
the issue does not always occur.
and i have decrease the frame rate from 65 to 60 .(my display is the same as sabresd's (HSD100PXN1)).
sometimes, the issue occurs when i boot system.
thanks
peter
Also You may refer to the next thread :
Re: To find the root cause of i.MX6Q IPU error interrupt.
Have a great day,
Yuri
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hi, Yuri Muhin
i have a look your mentioned thread.
but it hasn't been yet solved.
thanks
peter
Can you attach your kernel boot up log?
I am out of the office until 22.06.2014.
I will respond to your message when I return.
Note: This is an automated response to your message "Re:
- imx6 android 4.3.1 IPU error when system start" sent on 06/19/2014
11:53:16 AM.
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ok, i have attached the log.
if you haven't enabled the lvds display in your Uboot, I think you can remove the "CONFIG_MX6_CLK_FOR_BOOTUI_TRANS=y" from your kernel config, it will skip some code for IPU initializing, this maybe caused your issue.
hi, Qiang Li
sorry to bother you.
my log show the following message
---------------------------------------------------------------
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_10 = 0x00080000
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_5 = 0x00800000
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
i check the RM. Some information about it may be found in i.MX6 (Q) RM just before Table 37-36 (Error
Interrupts Summary) :
"The table below describes the error interrupts. The panic column indicates if this signal is
part of the logic generating the ipu_panic signal. The ipu_panic signal can be used for
indicating about errors that are result of data rate problems. Such problems may be a
result of the IPU running in slower clock then required by the use case. This signal can be
used in order to indicate the system that the IPU can't handle the desired data rate. In that
case the system may need to increase the clock to the IPU or simplify the use case."
so how do I increase the clock to IPU code?
Hi Fang, I double checked your boot log, there is only one IPU preoble information at first:
Freescale USB OTG Driver loaded, $Revision: 1.55 $
imx-ipuv3 imx-ipuv3.1: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)
MIPI CSI2 driver module loaded
That means ipu bypass reset is still working although you had disabled the CONFIG_MX6_CLK_FOR_BOOTUI_TRANS, please remove "fb0base=0x27b00000" from your boot command line, this will make IPU plat_data->bypass_reset be false, then IPU will always be fully initialized.
Hi, I can also confirm that by disabling the CONFIG_MX6_CLK_FOR_BOOTUI_TRANS flag the display is now working. The "fb0base" keyword from the command console can be removed only if the kernel actually parses it. It seems that the Sabre Board parses it in fixup_mxc_board(), but our board does not.
hi, Li Qiang
Thank you for your reply. as your said, my problem has been resolved.
if i want to enable the CONFIG_MX6_CLK_FOR_BOOTUI_TRANS, should I modify the u-boot?
thanks and B&R
peter
Yes, if you want to use CONFIG_MX6_CLK_FOR_BOOTUI_TRANS, you should initialize the IPU and Display in uboot, and the IPU number and DI port should be same in kernel and Uboot. The default BSP can only support LVDS panel in Uboot, there is another patch whcih can support more display type:
I am out of the office until 22.06.2014.
I will respond to your message when I return.
Note: This is an automated response to your message "Re:
- imx6 android 4.3.1 IPU error when system start" sent on 06/19/2014
12:08:11 PM.
This is the only notification you will receive while this person is away.
hi, Qiang Li
i removed the CONFIG_MX6_CLK_FOR_BOOTUI_TRANS, but the issue remained yet.
the log likes this:
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imx-ipuv3 imx-ipuv3.0: IPU DMFC DP HIGH RESOLUTION: 1(0,1), 5B(2~5), 5F(6,7)
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_10 = 0x00080000
imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_5 = 0x00800000
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0