iMX95 GPIO access and changes

[min-eta]

We have iMX95 EVK with Yocto LF6.12.34_2.1.0 loaded from the factory. We need have access and control over some GPIO pins, but there are not many accessible on the board for external use. So we have chosen to use GPIO_IO04 - 07. However, it looks like embedded Linux has set the IOMUX for these pins to ALT4, which means some SPI driver has control of it. This is evident when you use "gpioinfo" to see what the pins are doing, and GPIO_IO04 is currently the CS0 for the SPI bus, and the reset are inactive.

From Linux userspace, how can I set the IOMUX for these pins to be ALT0 so that "gpioset" and "gpioget" can access them. Also, GPIO_IO04 seems to be owned by some SPI driver, as the "resource" is not available to libgpiod.

Does anyone know which component/driver is currently owning it, and how can I remove/disable this component/driver?

If it requires a complete recompile of Yocto, how can I find out which component/driver to remove/disable?

[min-eta]

Thanks, I got it the DTB work, and can replicate what you did (see attached), but I notice that the hardware is not really toggling the physical pin that we have connected to another device.

We first tested the pins from uboot, and can see the physical pins toggling. Then after your help on updating the device tree, we tried to toggle the pins from Linux. The gpiod library operated as you indicated, but only [gpiochip3, 4] was toggling. Recall this pin was already set to be a GPIO previously as CS for SPI bus.

I am thinking that there must be missing, and the IOMUX is not actually setting the three pins [gpiochip3, 5, 6, 7[ to be GPIO (ALT0)?

I checked the DTS file you sent, and the imx95.dtsi file, and as far as I can see everything seems fine and logical.

[min-eta]

OK, I figured out what happened, but I do not know why. The board is in our test lab, which is remote to me, so I could not do any hard resets on the board when I test. I can only do soft resets.

After a hard reset, done by my tech guy over there yesterday, your changes worked, and the GPIOs toggled like they should, as GPIOs.

However, all this time before yesterday, with me doing soft resets, Linux did not seem to change the IOMUX registers even when using the new DTB file, asking for the 4 pins [gpiochip3, pins 4-7] to be set as GPIOs. They seem to remain as SPI pins, as previously set by the old DTB file.

Does writing to the IOMUX registers need special conditions? Like only after a hard reset?

[Chavira]

Hi @min-eta,

To flash a new device tree file to the board, you need to ensure that the correct file is referenced during the boot process. If you've renamed the device tree file, make sure to update the fdtfile variable in the U-Boot environment so the bootloader loads the correct DTB.

The IOMUX settings are configured in the device tree and applied during early kernel initialization. If your GPIOs are functioning correctly, it indicates that the IOMUX registers are properly set to GPIO mode.

Could you clarify how you're currently reading the IOMUX register values in Linux? This will help us better understand your approach and assist you more effectively.

Best regards,
Chavira

[min-eta]

Thanks Chavira. I will explain what I saw.

In the end there was no problem. Its just that there was a interim period where Linux didn't do the board init as expected. Soft resets did not seem to init the GPIOs correctly, only a hard reset (power down then power up) made Linux init the GPIOs correctly.

I changed the uboot "fdtfile" setting to use the new DTB file, then did a soft reset (the board is remote to me, so I couldn't reset it any other way). Then I saw that the GPIOs were available in the gpiod library functions (gpioinfo, gpioset, gpioget). But when I toggled the pins, only Pin 4 was working. Pins 5, 6, 7 did not toggle the pins. I can tell because we have test equipment expecting these pins to toggle.

Then, when my tech was in the lab, he did a hard reset on the board. After this, Linux did init the GPIO pins correctly, and when I retested the pins, all 4 GPIO pins were toggling. No other software changes were made, only the hard reset.

The reason I suspected that maybe ultimately the IOMUX pins were not correctly set by Linux after a soft reset is that, if you recall, originally these 4 pins were set got SPI7 use. Pin 4 was originally set as Chip_Select, so it is already set as a GPIO in the IOMUX. Pins 5, 6, 7 were set for SPI use, so they are not GPIOs.

So after we change the DTB file, we expect the 4 pins to be all GPIOs now. But if the soft reset did not actually change the IOMUX, but the gpiod library thought it did change them, then gpiod would try to toggle them, then only pin 4 would toggle because it is already a GPIO. But the other pins 5, 6, 7 are still SPI pins and would not toggle.

After a hard reset, the IOMUX seemed to be set up correctly, and now gpiod is actually toggling the all 4 pins in hardware, and I can see it on the test equipment.

[min-eta]

Hi Chavira, thanks! So I have to recompile the Yocto Linux? I am unfamiliar with this, as we've not done this step before. It looks like I have to put this new DTS file somewhere, and compile?

I had a search around, and does the PDF UG10164 give all the necessary steps, like a guide for dummies to someone who has not worked with Yocto Linux before?

Is there a way we can do a quick test from the Linux command line and try out our GPIOs without having to recompile everything?

[Chavira]

Hi @min-eta,

You can find the steps to compile the appropriate device tree in the following links.
Please note that it’s not necessary to compile the entire image, you can compile just the device tree files to apply the changes.

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-compile-Linux-Kernel-Image-and-de...

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-use-Devshell-to-compile-device-tr...

Best regards,
Chavira

[min-eta]

Hi Chavira, thanks for all the info. I finally got to doing this, but we are using a remote machine that does not have any window access. I am using ssh to access this Linux machine. So it looks like I cannot use devshell to compile the final dtb file.

I managed to compile all the device tree files with "make dtbs" on the linux-imx repo clone and the Yocto SDK, so how do I now compile the final dtb file?

min-eta

[Chavira]

Hi @min-eta,

Try using the Yocto SDK method.

The Yocto SDK method doesn't require graphical environment.

[Chavira]

Hi @min-eta,

Thank you for contacting NXP Support!

To use those GPIOs, you’ll need to disable the LPSPI7 interface, as those pins are currently configured for the LPSPI bus.

I’ve attached the recommended device tree configuration that reassigns those pins for GPIO functionality.
Once applied, you should be able to control them using standard gpio commands.

Best regards,
Chavira