iMX8QXP PCIe DMA linked list mode

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iMX8QXP PCIe DMA linked list mode

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david_binet
Contributor II

Hi,

I'm currently working on the DMA built inside the PCIe peripheral in the iMX8QXP. I'm interested in using the linked list mode for read and write access. From my understanding, some fields of the DMA Write Transfer Size Register are overwritten by the table in RAM as are the transfer size, SAR low, etc. registers. Are the same registers used with a read access ? If that's the case, would I still be able to trigger a read access at the same time as a write access?

 

Kind Regards,

 

David

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Yuri
NXP Employee
NXP Employee

@david_binet 
Hello,

   The DMA supports full duplex operation, processing read and write transfers at
the same time, therefore simultaneous read ops are available if the linked list mode is used only
for write ops.

Regards,
Yuri.

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