Hi,
I'm currently working on the DMA built inside the PCIe peripheral in the iMX8QXP. I'm interested in using the linked list mode for read and write access. From my understanding, some fields of the DMA Write Transfer Size Register are overwritten by the table in RAM as are the transfer size, SAR low, etc. registers. Are the same registers used with a read access ? If that's the case, would I still be able to trigger a read access at the same time as a write access?
Kind Regards,
David