iMX8M Mini Power Sequencing

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iMX8M Mini Power Sequencing

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omar_wolfe-huss
Contributor III

Hi, 

In the data sheet for the iMX8M Mini this table is given for the power up sequence:

pastedImage_1.png

Does this mean that if all the power rails are brought up simultaneously (as the minimum time for all rails to rail delays is 0ms) and then RTC_RESET_B is released some time later full and proper operation can be expected?

Likewise if all the rails are shutdown simultaneously will there be any adverse effects?

Many thanks

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Yuri
NXP Employee
NXP Employee

Hello,

  Note, timings T1, T2, T3 are based on NVCC_SNVS_1P8 start moment,
but T4 - T13 are based on PMIC_ON_REQ, because t1 is uncertain period.

In both groups all voltages can start their rising simultaneously in the groups.

 

Have a great day,

Yuri

 

 

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