Hi,
I am currently trying to force PSRAM to work. The PSRAM chip that I have on board is ISSI IS66WVC2M16ALL which is compatible with Micron Cellular RAM 1.5 spec.
I am using EIM driver setup to run this memory chip.
I configured Linux device tree as follow:
pinctrl_weim: weimgrp {
fsl,pins = <
MX6UL_PAD_CSI_DATA00__EIM_AD00 0xb0b1
MX6UL_PAD_CSI_DATA01__EIM_AD01 0xb0b1
MX6UL_PAD_CSI_DATA02__EIM_AD02 0xb0b1
MX6UL_PAD_CSI_DATA03__EIM_AD03 0xb0b1
MX6UL_PAD_CSI_DATA04__EIM_AD04 0xb0b1
MX6UL_PAD_CSI_DATA05__EIM_AD05 0xb0b1
MX6UL_PAD_CSI_DATA06__EIM_AD06 0xb0b1
MX6UL_PAD_CSI_DATA07__EIM_AD07 0xb0b1
MX6UL_PAD_NAND_DATA00__EIM_AD08 0xb0b1
MX6UL_PAD_NAND_DATA01__EIM_AD09 0xb0b1
MX6UL_PAD_NAND_DATA02__EIM_AD10 0xb0b1
MX6UL_PAD_NAND_DATA03__EIM_AD11 0xb0b1
MX6UL_PAD_NAND_DATA04__EIM_AD12 0xb0b1
MX6UL_PAD_NAND_DATA05__EIM_AD13 0xb0b1
MX6UL_PAD_NAND_DATA06__EIM_AD14 0xb0b1
MX6UL_PAD_NAND_DATA07__EIM_AD15 0xb0b1
MX6UL_PAD_NAND_CLE__EIM_ADDR16 0xb0b1
MX6UL_PAD_NAND_ALE__EIM_ADDR17 0xb0b1
MX6UL_PAD_NAND_CE1_B__EIM_ADDR18 0xb0b1
MX6UL_PAD_CSI_MCLK__EIM_CS0_B 0xb0b1
MX6UL_PAD_CSI_PIXCLK__EIM_OE 0xb0b1
MX6UL_PAD_CSI_VSYNC__EIM_RW 0xb0b1
MX6UL_PAD_CSI_HSYNC__EIM_LBA_B 0xb0b1
MX6UL_PAD_NAND_RE_B__EIM_EB_B00 0xb0b1
MX6UL_PAD_NAND_WE_B__EIM_EB_B01 0xb0b1
MX6UL_PAD_NAND_WP_B__EIM_BCLK 0xb0b1
MX6UL_PAD_NAND_DQS__EIM_WAIT 0xb060
MX6UL_PAD_ENET1_RX_ER__EIM_CRE 0xb0b1
MX6UL_PAD_LCD_DATA08__EIM_DATA00 0x1b0b1
MX6UL_PAD_LCD_DATA09__EIM_DATA01 0x1b0b1
MX6UL_PAD_LCD_DATA10__EIM_DATA02 0x1b0b1
MX6UL_PAD_LCD_DATA11__EIM_DATA03 0x1b0b1
MX6UL_PAD_LCD_DATA12__EIM_DATA04 0x1b0b1
MX6UL_PAD_LCD_DATA13__EIM_DATA05 0x1b0b1
MX6UL_PAD_LCD_DATA14__EIM_DATA06 0x1b0b1
MX6UL_PAD_LCD_DATA15__EIM_DATA07 0x1b0b1
MX6UL_PAD_LCD_DATA16__EIM_DATA08 0x1b0b1
MX6UL_PAD_LCD_DATA17__EIM_DATA09 0x1b0b1
MX6UL_PAD_LCD_DATA18__EIM_DATA10 0x1b0b1
MX6UL_PAD_LCD_DATA19__EIM_DATA11 0x1b0b1
MX6UL_PAD_LCD_DATA20__EIM_DATA12 0x1b0b1
MX6UL_PAD_LCD_DATA21__EIM_DATA13 0x1b0b1
MX6UL_PAD_LCD_DATA22__EIM_DATA14 0x1b0b1
MX6UL_PAD_LCD_DATA23__EIM_DATA15 0x1b0b1
>;
};
&weim {
#address-cells = <2>;
#size-cells = <1>;
ranges = <0x0 0x0 0x50000000 0x400000>;
fsl,weim-cs-gpr = <&gpr>;
bank-width = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
psram: psram@50000000 {
compatible = "mmio-sram";
reg = <0x0 0x0 0x400000>;
fsl,weim-cs-timing = <0x403104b1 0x00000000 0x0b010000
0x00000008 0x0b040040 0x00000000>;
};
};
The EIM driver (imx-weim.c) is set to be as given in iMX6UL RM point 21.7.3.1(Micron PSRAM Asynchronus Mode Configuration) for 16 bit memory.
After the system start I have the following:
cat /proc/iomem
...
50000000-503fffff : 50000000.psram
...
Which show me that psram is registered in the system.
But when I try to access the memory by
devmem2 0x50000000
I receive that
/dev/mem opened.
and the system is going to hang up.
I suppose that I have wrong registers values here :
fsl,weim-cs-timing = <0x403104b1 0x00000000 0x0b010000
0x00000008 0x0b040040 0x00000000>;
Has anyone successfully run this particular model of PSRAM chip with IMX6 and can provide the accurate timings please?
I am wondering as well if the problem is not caused by not connected on my board PSRAM pins A19 and A20 to the IMX6? As pin A19 can be used to set PSRAM control registers.
But in the PSRAM documentation there is as well 'software way' of setting those control registers showed - so I doubt whether A19 is important here?
Best regards,
Krzysztof Lukaszewicz
Please refer chapter 22.7 of i.MX 6UltraLite Applications Processor Reference Manual regarding to PSRAM initialization.
Have a great day,
Victor
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Hi,Victor:
I can't find the chapter 22.7 in the i.MX 6UltraLite Applications Processor Reference Manual,and now I also
have the problem of PSRAM.