iMX6Q : How to work a software reset ( set SRC_SCR register ) ?

[koichisakagami]

Dear community,
I am checking a SRC_SCR register coreX_rst field. (X is 0,1,2,3)

In the case of setting a coreX_rst field , does the reset process begin immediately ?

Or , after performing any process , does the reset process subsequently begin ?

Best Regards,
Koichi Sakagami

[Yuri · Accepted solution]

Hello,

  timings for the secondary CPU reset are not specified, since this

is mainly software, not hardware, process.

"Once the bits are set, the corresponding core is released from its reset state,

and it executes the boot ROM (at 0000 0000h). The boot ROM determines if it
is a secondary core and uses the persistent bit registers to determine what to
execute next."

Have a great day,
Yuri

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