iMX6 Reset Image

[Poussemousse]

Is there any pin on iMX6 (Solo) which is the image of the processor Reset internal state.

I would like to use it in order to warn external component that the processor is in Reset state.

I am wondering if SRC_ONOFF or PMIC_ON_REQ could be used.

Any idea is welcome,

Poussemousse

[YixingKong]

Poussemoous

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Thanks,

Yixing

[YixingKong]

Poussemoousse

Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel

free to reply with an update to this discussion.

Thanks,
Yixing

[ZeeFrench]

Haven't seen such reset output signal we may had in previous architectures. ONOFF can generate reset but is an input. PMIC-ON-REQ is a wake up request after ON OFF has been pushed but only if you use this optional scenario. The real reset signal is POR/. Even if it is asserted by PMIC once voltages are stables, you can use the same if the intent is to propagate it to your peripherals.

To manage further cold or warm resets, you need to analyse the possible sources in your system (check SRCF_SRSR for the list) to disable or combine them :

* Warm reset : software reset, can be disabled or obviously managed by software

* Jtag : you can use same external signal if hardware, probably avoid software jtag reset

* Watchdog  : WDOG_B signals can be configured as output

* Ipp_user : ON OFF button if used

* Csu : if security / tamper is enabled

* Ipp : POR/ pin

Best regards, Philippe.

[fredericthierry]

I don't know of such a pin on iMX6 but perhaps I didn't see it.

Anyway, you can use a simple GPIO for this task. Add a pull-up or pull-down. At reset, GPIO are defined as inputs. When your system is ready, switch it to output and toggle it.

That's the way I would do as you're free to choose when you consider the system is operational.

Kind Regards

Frederic Thierry