i.mx6 usb resume problem

[m_morimune]

Hi all!

I am developing a USB HOST driver (using HOST1) for i.mx6solo.

Currently, SUSPEND and RESUME have been confirmed, but there is a problem with RESUME.
Please tell me if you know the cause.

phenomenon:
Transition to SUSPEND.
There is no problem in looking at CATC logs. (FULL SPEED J) is output.

Perform the following operations to resume.
PORTSC1.FPR = 1
After this, it is waiting for PORTSC1.FPR = = 0, but this bit remains as 1.

Looking at the CATC log, the RESUME signal (FULL SPEED K) is output for about 20 ms, but it appears that (FULL SPEED J) is output thereafter.

And, the power down of PHY is not executed.
Only manipulation of PORTSC1 register.

Thank you for your cooperation.

[igorpadykov]

Hi Masahiro

usb resume functionality was validated in sect.4.2.4. DEVICE SUSPEND/RESET/RESUME

usb sertification report document found on

USB Certification report of i.Mx6 

I.MX6 series USB Certification Guides 

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[m_morimune]

Thank you for your reply igor.

The following two registers were operated by me during SUSPEND / RESUME.
PORTSC1.SUSP
PORTSC1.FRP

When 1 is written to PORTSC1.SUSP, transition to SUSPEND is observed in the CATC log.
After that, when 1 is written to PORTSC1.FRP, RESUME will be executed for a moment and will be suspended immediately.
Looks like it's back.
(Please see the attached file)

Question 1: Can this device not be able to execute SUSPEND / RESUME just by operating PORTSC1?
                    Do you also need to operate the USB PHY?

I executed SUSPED / RESUME by adding the following code to the test.
At this time, I confirm that it will be resume.

(1) SUSPEND time
    PORTSC1.SUSP = 1
    delay 10ms
    PORTSC1.PHCD = 1
    USBPHY2_PWD = 0xFFFFFFFF
    USBPHY2_CTRL.CLKGATE = 1

(2) At RESUME time
     USBPHY2_CTRL.CLKGATE = 0
     USBPHY2_PWD = 0x00000000
     PORTSC.PHCD = 0
     PORTSC1.FRP = 1
     delay 30ms
     PORTSC1.SUSP = 0
     PORTSC1.FRP = 0

Question 2: The following explanation is given in “4.3.2.2 Exiting low power mode” of AN 4589.
                       Clear PHCD bits in the PORTSC register
                       CLKGATE and PWD will auto clear

                   However, when I tried, I did not resume unless I explicitly cleared CLKGATE and PWD.
                   Is this necessary?

Best regards
Masahiro