i.mx6 PCIe Endpoint

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i.mx6 PCIe Endpoint

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test_me
Contributor I

Hi,

has anybody used the i.mx6 board as a PCIe endpoint?

I would like to connect the i.mx6 board to a host system. The host system acts as the PCIe root complex. As fas as I know, the official release contains only a rootcomplex driver.

Is there source code available, which I could use as a starting basis to implement a PCIe endpoint?

Thanks in advance.

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YixingKong
Senior Contributor IV

At this point in time, Freescale is only supporting PCIe in root complex mode. Therefore, we do not have any End Point code to give out. I am aware the at least two customers of i.MX6 processors are using the i.MX6 in End Point mode. I do not know if they are willing to share their work, but this forum is the right place to ask for it.

Cheers,

Mark

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matevzlangus
Contributor III

Hi,

we have been able to use i.MX6 in PCIe EP mode connected to i.MX6 in PCIe RC and also to Freescale QorIQ P1020 running in RC mode.

In our case i.MX6 running in EP mode supports:

- inbound memory transactions (thru exposed BARs) and using iATU inbound translations to get from PCI bus address to a dedicated address in RAM

- outbound memory transactions to the RC or to other EPs

- generating MSI interrupts to the RC

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haider
Contributor II

Hi Matevz,

Will it be possible for you to share the endpoint code.

Thanks,

Haider

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salil
Contributor II

Hello,

That is a wonderful news. Is it possible to share the code (i.e. driver code of EP and RC used to configure above mentioned functionality ) running on iMX6 as EP and RC (or if it is P1020).  This would be of great help.

regards

Salil

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YixingKong
Senior Contributor IV

At this point in time, Freescale is only supporting PCIe in root complex mode. Therefore, we do not have any End Point code to give out. I am aware the at least two customers of i.MX6 processors are using the i.MX6 in End Point mode. I do not know if they are willing to share their work, but this forum is the right place to ask for it.

Cheers,

Mark

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richard_zhu
NXP Employee
NXP Employee

One pcie rc/ep validation had been done. One imx6q is used as pcie rc, the other one is used as pcie ep.

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scottkanowitz
Contributor II

Excellent news!

Is there an expected date available as to when this will be released, if at all? Additionally, is there any preliminary sample code available to show the endpoint setup?

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richard_zhu
NXP Employee
NXP Employee

I can past the patches into community, after I finish the usage how-to document.

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richard_zhu
NXP Employee
NXP Employee

Past the wrong URL before by my phone, here is the correct one.

https://community.freescale.com/docs/DOC-95014

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salil
Contributor II

Hello,

Does the RC supports MSI (Message Signaled Interrupts) in the existing release

regards

Salil

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richard_zhu
NXP Employee
NXP Employee

Yes, it is. MSI had been supported by the existing release.

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salil
Contributor II

Hello,

Forgive me for repeating the question, wanted to confirm MSI support in freescale release L3.0.35_4.0.0_130424. I saw in the manual (i.MX 6Dual/6Quad Linux Reference Manual) accompanied with the release that MSI support is incomplete (see end note of section "35.1.4 Features"), copying exact lines:

" Out of the above, MSI, I/O access, Port Bus Driver integration are currently incomplete. "

Please confirm if this is true for this release or please indicate the exact release number in which MSI support became completely part of freescale release.

regards

Salil

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brettwilson
Contributor I

That is good news.  So does this mean Freescale will release some driver code soon to support iMX6 PCIe endpoint?

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richard_zhu
NXP Employee
NXP Employee

Yes, it is.

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dirkrohleder
Contributor I

Hi,

I try to solve a similar issue. Did you already get some additional information about this topic?

'Want to connect an iMX6 Board as endpoint to a Windows 7 PC as root complex.

Thank you !

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