i.mx53 ddr3 setting

[MaxChou]

Hi  All

I had a question about i.mx53 DDR3 ZQ setting,

in i.mx53_smd flash_header.S

MXC_DCD_ITEM(22, IOMUXC_BASE_ADDR + 0x724, 0x04000000)

The ddr_sel is "10"

but I can find two different description in i.mx53RM,

the smd schematic use 240 ohm ZQ resitor, 

which DDR_SEL value is correct?? "00" or "10"

Table 43-2. DDR Output Driver Average Impedance

IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE field descriptions

Sincerely, Max

[admin]

From BartButler:

Max,

I believe you missed the bottom entry of the IOMUXC values.

It indicates the same as previous table.

The item in conflict you circled is 1.5V DDR3 where as the first one is 1.2V LPDDR2.

Or maybe I did not understand your question.

If not please state and add in the specific use case - for example - DDR3, 1.5V, select=10 etc