i.MXQXP/i.MX8X Parallel CSI / Parallel Capture for a 8-bit parallel input

[fx73]

Can the i.MXQXP/i.MX8X Parallel CSI interface be used to capture low-speed, basic 8-bit data?

Looking at possibly using it for an additional 8-bit ADC with one clock.

So 1 clock input, 8 data bits, transfer per clock period.

[joanxie]

sorry, I thought of imx8qm, for imx8qxp parallel csi port, you can refer to the dtsi file for clock settings

"https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8x-mek.dt..."

ov5640: ov5640@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_parallel_csi>;
		clocks = <&pi0_misc_lpcg 0>;
		assigned-clocks = <&pi0_misc_lpcg 0>;
		assigned-clock-rates = <24000000>;
		clock-names = "xclk";
		powerdown-gpios = <&lsio_gpio3 2 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&lsio_gpio3 3 GPIO_ACTIVE_LOW>;
		csi_id = <0>;
		mclk = <24000000>;
		mclk_source = <0>;
		status = "okay";

for this clock, you can refer to the:

"https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8-ss-img....

pi0_misc_lpcg: clock-controller@5826301c {
		compatible = "fsl,imx8qxp-lpcg";
		reg = <0x5826301c 0x4>;
		#clock-cells = <1>;
		clocks = <&clk IMX_SC_R_PI_0 IMX_SC_PM_CLK_MISC0>;
		bit-offset = <0>;
		clock-output-names = "pi0_lpcg_misc_clk";
		power-domains = <&pd IMX_SC_R_ISI_CH0>;
	};

[fx73]

Yes, the port I have available is the Mipi CSI port. CSI_DO0 through CSI_DS07, plus Hsync and Vsync. 

 Would it be possible these just these pins?

Also, where can I find more details on the PI capture besides the reference manual or datasheet?

[fx73]

On MIPI_CSI0_I2C0_SCL and MIPI_CSI0_I2C0_SDA, there appears to be two clock paths, 

But, are both the CI_PI i2c and CSI0 i2c available?

Assuming only CSI0 i2c is available, which one do these correspond? #1 or #2?

is there a choice between the 24 MHz clock and DIG_PLL0? Or is it that only the CI_PI has access to it and the CSI0 only has access to the PLL:

So, to access only the CSI0 I2C0, how many clocks enables are needed in total? Assuming that the only option is via the PLL, I just need to make sure I am only turning on what is needed, nothing more, but it seems the PLL would also has gated further upstream, or no? Or is it fixed at 120 MHz as the clock input to this CSI0 I2C0, LPI2C module?

[joanxie]

where did you get this picture, refer to the imx8qxp reference manual, I found a bit different

refer to the dts file

clocks = <&clk IMX_SC_R_PI_0 IMX_SC_PM_CLK_MISC0>;

for clock settings, you also can refer to the clock driver

"https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/clk/imx?h=lf-5.15.y"

[fx73]

Also, at what stage in boot-up does the CSI0 i2c become available? In other words, is it available prior to the application image being launched?