i.MX8QX: howto initialize MIPI-DSI in LP only mode

[Niebel-TQ]

I'm trying to configure the NWL-DSI Bridge for LP mode early to enable sending DSI commands before having a valid display mode, but currently without success.

Thanks in advance

Markus

[igorpadykov]

Hi Markus

one can try to use MIPI_DSI_MODE_LPM flag in custom panel driver as in rm67191 example:

https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek-...

https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/panel/panel-raydium-rm6719...

https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/panel/panel-simple.c?h=imx...

Old silicon rev.B0 has LP(low power) mode erratum which is fixed in rev.C0:

ERR011418: MIPI DSI: Incorrect CRC and payload corruption reported with DCS long write command

Mask Set Errata for Mask 0N95W-B0 Silicon

Best regards
igor

[Niebel-TQ]

Thank you and sorry for the late reply.

We use CPU with C0 Die.

The bridge IC (DSI -> DP) seems to need a continously running clock signal on the DSI lines for some communication (mainly for DP AUX channel).The code runs during the drm_get_modes hook, when there is no timing available for the DSI host.

Besides that, the suggested LPM Flag switches only clock during DSI communication. The bridge IC is configured via I2C.

We will go and get some more support from the IC vendor.