i MX8M System Boot- IVT

[bharatkumarbach]

I found out from the datasheet that the IVT offset is 0x8400 (sector 66) if the boot device type is SD/MMC.  

The image I build decodes into following entries at 0x8400

Header: D1 00 20 41

Entry: 00 00 C1 32

reserved1: 00 00 00 00

dcd: 00 00 00 00

boot data: 20 70 C2 32

self: 00 70 C2 32

csf: 40 70 C2 32

reserved2: 00 00 00 00

Figure 6-18 from Reference manual says Entry, boot data, and self points to the locations in dest memory.

What is the destination memory? Is it RAM? If so then none of those address matches with the address map of DDR.

How should I understand those address?

Also Figure 6-3. Internal ROM and RAM memory map is missing from the reference manual

Thanks

Bharat

[igorpadykov]

Hi Bharat

yes destination memory may be ddr, ivt description can be found in sect.6.1.6 Program image

i.MX8MDQ Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf

or sect.2.5. Boot Image AN12107

https://www.nxp.com/docs/en/application-note/AN12107.pdf 

Procedure for image programming is described in Linux Guide included in linux documentation

https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS&appType=license&location=null 

Best regards
igor
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[bharatkumarbach]

I am trying to understand the flow of boot from IVT to first stage bootloader(U-BOOT). I decoded the above fields using IVT description in reference manual itself. I am confused with the values of the entry, boot data and self absolute address fields of IVT table which are in the memory mapped address of HDMI RAM

As far as I understood ROM verifies if the HDMI image is present or not. If yes ROM will load the image into HDMI RAM. I would like to know which entry in the IVT table tells ROM about the physical address of Image on SD-card to be copied into RAM.

Also, it would be of great help if I get some detailed insights into the boot process involving the eMMC/SD BOOT layout in Reference Manual Table 6-22.

What about missing Figure 6-3. Internal ROM and RAM memory map in the Reference manual?

Thanks,

Bharat Kumar Bacha

[igorpadykov]

Hi Bharat

i.MX8 processors use more complicated image structure as described in

sect.4.5.13 How to build imx-boot image by using imx-mkimage attached Linux Guide.

Also steps are described in MX8M_DDR_Tool_User_Guide.docx included in ddr test package.

i.MX8MSCALE DDR Tool Release 

Shortly, first ROM Code boots up and checks valid image in specific storage,
then ROM code loads u-boot-SPL to TCM and jumps to it.
After that u-boot-SPL initializes DDR, loads ATF to IRAM, loads uboot
to DDR and jumps to ATF. ATF executes ARM and security related
initialization and then jumps to u-boot.

Best regards
igor
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[bharatkumarbach]

Thanks for the information. 

"6.1.6.2: ROM will check the HDMI image viability first and then the standard image."

I would like to know the best use case of the HDMI image and If I can boot directly into standard image skipping HDMI image.

Regards

Bharat K Bacha

[igorpadykov]

Table 6-22, Table 6-23 i.MX8MQ Reference Manual shows differencies between hdmi and normal images.

Best regards
igor

[bharatkumarbach]

The table just explains how the components of the HDMI image are laid out but not why/how is it used which was my question. 

The specific question would be differences between image(HDMI Image) starting from sector 66 and image(A53 Standard Image) starting from sector 274 and what happens if I zero out the IVT table at sector 66.

Also, what is the significance of the extra Copy of IVT and BOOT DATA at sector 264

[igorpadykov]

>The table just explains how the components of the HDMI image are laid out

>but not why/how is it used which was my question. 

this image layout is used by ROM and defined by processor design. HDMI module uses small

separate programmable core which requires loading of own image.

>Also, what is the significance of the extra Copy of IVT and BOOT DATA at sector 264

it is image for A53 core. First copy of ivt is for hdmi firmware.

Best regards
igor