i.MX8M-Plus RDC Sema42 for intra-cluster isolation

[erigggggggggg]

I would like to use the RDC on i.MX8M-Plus to isolate the cores within the A53 cluster. Is it possible to use the RDC semaphores to disallow certain cpus from the A53 cluster accessing a peripheral?

The reference manual IMX8MPRM Rev 3 is not quite clear on how the GTFSM field works in the gate register RDC_SEMAPHOREx_GATEn (section 3.2.6.1). It has two bits to inform about the locking domain and four bits to inform which "processor" is locking the semaphore.

Is a "processor" a cluster (A53, M7) or a core within the cluster? 

If core0 on A53 cluster locks the semaphore to UART1, can core1...3 still access UART1?

[yipingwang · Accepted solution]

No.

On i.MX8M Plus, the RDC semaphore “processor” is a bus master / RDC master, not an individual A53 core. The A53 cluster appears as one A53 platform master/domain for RDC purposes. The A53 quad-core cluster is treated as a single master domain, meaning all four A53 cores (core0–core3) belong to the same RDC domain. As a result, the Sema42 semaphore's GTFSM field identifies which domain (e.g., A53 cluster vs. M7 core) holds the lock, not which individual core within the cluster.

So if A53 core0 locks the semaphore for UART1, A53 core1–3 are not individually blocked by that RDC semaphore. They can still access UART1 if they are in the same A53/RDC domain.

For intra-cluster core isolation, you would need to rely on software-level mechanisms (such as OS-level resource management or spinlocks) rather than the hardware RDC/Sema42.

[erigggggggggg]

thanks for your response.

the i.MX 8QuadMax has two core complexes (A53 and A72). is it possible to use xRDC2 to isolate between the two?

[yipingwang]

Yes, A53-vs-A72 isolation is a valid use case, provided you model them as separate SCFW resource partitions and assign resources accordingly. It is different from trying to isolate A53 core0 from A53 core1, which xRDC2 is not designed to do.