i.MX8M Mini Minimum Power Up Requirements

[kevinl]

Hello,

I was looking at Figure 3 in i.MX8M Mini datasheet (https://www.nxp.com/docs/en/data-sheet/IMX8MMCEC.pdf) with Table 17 and it looks like the minimum time from start of one rail to start of the next is 0 ms for all rails, including POR_B deassert, which seems strange to me. 

Is it true you can just enable everything, including POR_B at the same time, ignoring the ramp time of the regulators? Or are there hidden requirements other than the:

"For ramp up requirement, only VDD_ANA0_1P8 has 5 s minimum requirement, others do not have such requirement. During power-up, make sure NVCC_xxx - PVCCx_1P8 < 2 V."

For example:

[Yuri]

@kevinl 
Hello,

   In the datasheet, we have the VDD_SOC, VDD_ANA_0P8, VDD_ARM_PLL_0P8, etc.,
referenced to PMIC_ON_REQ signal. Therefore the rising of the mentioned supply voltages
(VDD_SOC, VDD_ANA_0P8, VDD_ARM_PLL_0P8, etc) should be performed (possibly
simultaneously) after VDD_SNVS_0P8 and NVCC_SNVS_1P8 are stable.

Regards,
Yuri.

[kevinl]

Hi Yuri,

Thank you for the quick response!

To confirm, POR_B de-assert is not gated by any rail except PMIC_ON_REQ and RTC_RESET_B? As in, it can go high before VDD_SOC completes it's ramp for example?

[Yuri · Accepted solution]

@kevinl 
Hello,

   According to Table 8 (Reset and ON/OFF recommendations) of
i.MX 8M Mini Hardware Developer’s Guide, User's Guide, Rev. 2, 11/2020:

  The POR_B input must be asserted at powered up and remain asserted
until the last power rail for devices required for system boot are at their
working voltage.

https://www.nxp.com/webapp/Download?colCode=IMX8MMHDG

Regards,
Yuri.

[kevinl]

Hi Yuri,

Thank you for the link to the HDG, I will read it to find any specification requirements that are missing from the datasheet.