i.MX8 and DDR4 frequency

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX8 and DDR4 frequency

Jump to solution
2,489 Views
saidjazouly
Contributor III

Hi NXP,

We designed a board based on i.MX8M mini that runs Linux. Currently the processor and the DDR4 is running at a speed of 1200MHz. Our customer (Shapertools) needs to crank the processor frequency to 1800MHz and DDR4 to 1333MHz (Max speed supported by the memory).

 

The question would be:

what is the procedure (step by step) to increase the frequency of both the processor and the DDR4 in u-boot and Linux?

 

If this can be useful here is the output of u-boot reporting the frequencies.

Boot SPL 2020.04-imx_v2020.04_5.4.24_2.1.0+g4979a99482 (May 30 2020 - 06:50:01 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 2400MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC1
NOTICE: BL31: v2.2(release):imx_5.4.24_er3-0-gb0a00f22b-dirty
NOTICE: BL31: Built : 13:33:06, May 14 2020
C: Error DRAM should not in Self Refresh


U-Boot 2020.04-imx_v2020.04_5.4.24_2.1.0+g4979a99482 (May 30 2020 - 06:50:01 +0000)

CPU: i.MX8MMQ rev1.0 1800 MHz (running at 1200 MHz)

 

Thank you!

Labels (1)
0 Kudos
1 Solution
2,478 Views
Yuri
NXP Employee
NXP Employee

@saidjazouly 
Hello,

 

Please look at my comments below.

1.
Use Chapter 4 (How to bring up a new MX8MSCALE board) of MSCALE_DDR_Tool_User_Guide.pdf
in "mscale_ddr_tool_v310_setup.exe.zip"

https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors%40tkb/927/4/mscale_ddr_to...

 

Summary Page:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/110...

 

The following resource shows how to change DRAM frequency.

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/iMX-8M-Mini-Register-Programming-Aid-DRA...


The i.MX8Mm RPA link:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MMini-m845S-DDR-Register-Programmin...

 

2.
   As for Linux settings - they are located in Linux device tree.
Bus frequency modes are defined in the SoC dtsi files arch/arm64/boot/dts for i.MX 8M.
Use section 2.5.4 (Dynamic Bus Frequency) of "i.MX_Reference_Manual.pdf" in Linux
documentation for more details.

https://www.nxp.com/docs/en/reference-manual/IMX_REFERENCE_MANUAL.pdf

Linux Summary Page:

https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applicat...

3.
Note1: the working (frequency) points for Linux and U-boot (in RPA) should be the same.
Note2: it is highly recommended to use the NXP settings, since they are tested.

Regards,
Yuri.

View solution in original post

0 Kudos
1 Reply
2,479 Views
Yuri
NXP Employee
NXP Employee

@saidjazouly 
Hello,

 

Please look at my comments below.

1.
Use Chapter 4 (How to bring up a new MX8MSCALE board) of MSCALE_DDR_Tool_User_Guide.pdf
in "mscale_ddr_tool_v310_setup.exe.zip"

https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors%40tkb/927/4/mscale_ddr_to...

 

Summary Page:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/110...

 

The following resource shows how to change DRAM frequency.

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/iMX-8M-Mini-Register-Programming-Aid-DRA...


The i.MX8Mm RPA link:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MMini-m845S-DDR-Register-Programmin...

 

2.
   As for Linux settings - they are located in Linux device tree.
Bus frequency modes are defined in the SoC dtsi files arch/arm64/boot/dts for i.MX 8M.
Use section 2.5.4 (Dynamic Bus Frequency) of "i.MX_Reference_Manual.pdf" in Linux
documentation for more details.

https://www.nxp.com/docs/en/reference-manual/IMX_REFERENCE_MANUAL.pdf

Linux Summary Page:

https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applicat...

3.
Note1: the working (frequency) points for Linux and U-boot (in RPA) should be the same.
Note2: it is highly recommended to use the NXP settings, since they are tested.

Regards,
Yuri.

0 Kudos