I'm trying to understand which pins, and for what purpose, the iMX8 Nano uses for SD/eMMC boot. Specifically the USDHC-3 port. Our product will boot from an eMMC on USDHC-3. It appears the datasheet and the reference manual don't agree on pin usage.
The datasheet lists these pins:
I've highlighted the pins that don't seem to agree with the reference manual (below).
The Reference Manual lists a different set of pins:
As can be seen, some of these pins are the same as listed in the datasheet, some are different. I've highlighted the pins that are different.
As an example: If I look at the datasheet, I would believe the NAND_READY_B pin is used for the eMMC/SD reset. But if I look at the reference manual it says the GPIO1_IO09 pin. Either is potentially possible:
What is the correct list of pins and functionality for USDHC3 boot?
Thanks very much.
I'm updating this post after we received a reply from NXP support. They said the datasheet is wrong, and the reference manual is correct.
Note this also means the USDHC3 pins are spread over two different power domains (which is a bit unfortunate, but at least we know).