I have a custom imx7 board and use NXP Kernel 4.14 (rel_imx_4.14.78_1.0.0_ga).
On M4 I use the Echo FreeRTOS RTOS API demo. For the M4 UART3 is used.
When I start the M4 in U-Boot, I can read the message
"RPMSG Echo FreeRTOS RTOS API Demo...
RPMSG Init as Remote".
But I can not read the messages on the M4 UART under Linux. I get messages like "���?��q����0��3�9�8�hN��2��y���x�".
Checking the UART shows that the speed of the UART has been increased.
imx7:
uart3: serial@30880000 {
compatible = "fsl,imx7d-uart",
"fsl,imx6q-uart";
reg = <0x30880000 0x10000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_UART3_ROOT_CLK>,
<&clks IMX7D_UART3_ROOT_CLK>;
clock-names = "ipg", "per";
dmas = <&sdma 26 4 0>, <&sdma 27 4 0>;
dma-names = "rx", "tx";
status = "disabled";
};
Board:
pinctrl_uart3: uart3grp {
fsl,pins = <
MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76
MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76
MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e
>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
status = "okay";
};
M4:
&uart3 {
status = "disabled";
};
解決済! 解決策の投稿を見る。
Hi igor,
I found the problem at the end of drivers/clk/imx/clk-imx7d.c.
imx_clk_set_parent(clks[IMX7D_UART3_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); imx_clk_set_rate(clks[IMX7D_UART3_ROOT_DIV], 80000000);
imx_clk_set_parent(clks[IMX7D_UART5_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); imx_clk_set_rate(clks[IMX7D_UART5_ROOT_DIV], 80000000);
imx_clk_set_parent(clks[IMX7D_UART6_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); imx_clk_set_rate(clks[IMX7D_UART6_ROOT_DIV], 80000000);
After commenting out the block, I get a readable output on the UART of the M4.
Hi igor,
I found the problem at the end of drivers/clk/imx/clk-imx7d.c.
imx_clk_set_parent(clks[IMX7D_UART3_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); imx_clk_set_rate(clks[IMX7D_UART3_ROOT_DIV], 80000000);
imx_clk_set_parent(clks[IMX7D_UART5_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); imx_clk_set_rate(clks[IMX7D_UART5_ROOT_DIV], 80000000);
imx_clk_set_parent(clks[IMX7D_UART6_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); imx_clk_set_rate(clks[IMX7D_UART6_ROOT_DIV], 80000000);
After commenting out the block, I get a readable output on the UART of the M4.
Hi Max
one can try kernel boot parameter uart_from_osc, described in
Table 11. Common kernel boot parameters attached Release Notes or
try to implement similar solution.
Best regards
igor
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Hi igor
uart_from_osc didn't change anything.