i.MX6ULL DRAM_VREF

[ban45]

Hi

About the voltage divider resistance of DRAM_VREF.

MX 6ULL Applications Processors for Industrial Products, Rev. 1.2, 11/2017 stated that it was 1.5kΩ ± 0.1%.

Hardware Development Guide for the i.MX 6ULL Applications Processor, Rev. 0, 08/2016　stated that it was 1.54kΩ ± 0.5%.

①What is the difference in resistance?

②What happens with different tolerances?

➂Is it okay to use 1.5kΩ ± 0.5%?

Please tell me about ① ～ ③.

best regard

[Yuri]

@ban45 
Hello,

   Generally both variants (1.5kΩ ± 0.1% and 1.54kΩ ± 0.5%) are acceptable.
The variant 1.5kΩ ± 0.5% also is possible, but 0.1% resistors accuracy is more preferable.

Regards,
Yuri.

[ban45]

Hello,

What is the difference between 1.5kΩ ± 0.1% and 1.54kΩ ± 0.5%?

I couldn't understand why 0.1% was good by looking at the data sheet.
Could you tell me?

best regard

[Yuri]

@ban45 
Hello,

  "Using resistors with recommended tolerances ensures the ± 2% DDR_VREF tolerance
(per the DDR3 specification) is maintained when two DDR3 ICs plus the i.MX 6ULL are
drawing current on the resistor divider".

  You may look at the following general considerations:

https://www.maximintegrated.com/en/design/technical-documents/tutorials/7/719.html

In particular: Figure 4. This simple resistor-divider analogy represents a voltage reference
unloaded (A) and loaded (B).

Regards,
Yuri.